STL18N65M2 Datasheet N-channel 650 V, 0.290 typ., 8 A MDmesh M2 Power MOSFET in a PowerFLAT 5x6 HV package Features V T R max. I Order code DS Jmax DS(on ) D STL18N65M2 715 V 0.365 8 A 1 2 3 Extremely low gate charge 4 Excellent output capacitance (C ) profile oss PowerFLAT 5x6 HV 100% avalanche tested Zener-protected D(5, 6, 7, 8) Applications G(4) Switching applications Description This device is an N-channel Power MOSFET developed using MDmesh M2 S(1, 2, 3) AM15540v7 technology. Thanks to its strip layout and an improved vertical structure, the device exhibits low on-resistance and optimized switching characteristics, rendering it suitable for the most demanding high efficiency converters. Product status link STL18N65M2 Product summary Order code STL18N65M2 Marking 18N65M2 Package PowerFLAT 5x6 HV Packing Tape and reel DS10248 - Rev 4 - July 2020 www.st.com For further information contact your local STMicroelectronics sales office.STL18N65M2 Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter Value Unit V Gate-source voltage 25 V GS Drain current (continuous) at T = 25 C 8 A C (1) I D Drain current (continuous) at T = 100 C 5 A C (2) I Drain current pulsed 32 A DM P Total power dissipation at T = 25 C 57 W TOT C I Avalanche current, repetitive or non-repetitive (pulse width limited by T max) 1.8 A AR J E Single pulse avalanche energy (starting T = 25 C, I = I , V = 50 V) 120 mJ AS J D AR DD (3) dv/dt Peak diode recovery voltage slope 15 V/ns (4) dv/dt MOSFET dv/dt ruggedness 50 T Operating junction temperature range J -55 to 150 C T Storage temperature range stg 1. The value is limited by package. 2. Pulse width is limited by safe operating area. 3. I 8 A, di/dt 400 A/s, V V , V = 400 V. SD DS(peak) (BR)DSS DD 4. V 520 V. DS Table 2. Thermal data Symbol Parameter Value Unit R Thermal resistance junction-case 2.2 C/W thj-case (1) R Thermal resistance junction-ambient 59 C/W thj-amb 1. When mounted on 1inch FR-4 board, 2 oz Cu. DS10248 - Rev 4 page 2/15