650V-27mW SiC Cascode Rev. A, March 2019 DATASHEET Description United Silicon Carbide s cascode products co-package its high- UF3C065030B3 performance G3 SiC JFETs with a cascode optimized MOSFET to produce the only standard gate drive SiC device in the market today. This series exhibits ultra-low gate charge, but also the best reverse recovery characteristics of any device of similar ratings. These devices are excellent for switching inductive loads when used with recommended RC-snubbers, and any application requiring standard TAB gate drive. D (2) Features TAB w Typical on-resistance R of 27mW DS(on),typ w Maximum operating temperature of 175C w Excellent reverse recovery G (1) w Low gate charge 2 w Low intrinsic capacitance 3 1 w ESD protected, HBM class 2 w Very low switching losses (required RC-snubber loss negligible S (3) . under typical operating conditions) Typical applications w EV charging Part Number Package Marking w PV inverters 2 D PAK-3L UF3C065030B3 UF3C065030B3 w Switch mode power supplies w Power factor correction modules w Motor drives w Induction heating Datasheet: UF3C065030B3 Rev. A, March 2019 1Maximum Ratings Parameter Symbol Test Conditions Value Units V Drain-source voltage 650 V DS Gate-source voltage V DC -25 to +25 V GS T = 25C 65 A C 1 I Continuous drain current D T = 100C 47 A C 2 T = 25C Pulsed drain current I 230 A C DM 3 L=15mH, I =4A E 120 mJ Single pulsed avalanche energy AS AS T = 25C Power dissipation P 242 W C tot Maximum junction temperature T 175 C J,max Operating and storage temperature T , T -55 to 175 C J STG Max. lead temperature for soldering, T 250 C L 1/8 from case for 5 seconds 1. Limited by T J,max 2. Pulse width t limited by T p J,max 3. Starting T = 25C J Thermal Characteristics Value Parameter Symbol Test Conditions Units Min Typ Max Thermal resistance, junction-to-case R 0.48 0.62 C/W qJC Datasheet: UF3C065030B3 Rev. A, March 2019 2