1.6 mm Si8424CDB www.vishay.com Vishay Siliconix N-Channel 8 V (D-S) MOSFET FEATURES PRODUCT SUMMARY TrenchFET power MOSFET a, e V (V) R () MAX. I (A) Q (TYP.) DS DS(on) D g Low-on resistance 0.020 at V = 4.5 V 10 GS Ultra-small 1.6 mm x 1.6 mm maximum outline 0.021 at V = 2.5 V 9.7 GS Ultra-thin 0.6 mm maximum height 8 0.023 at V = 1.8 V 9.3 25 nC GS Material categorization: for definitions of 0.028 at V = 1.5 V 8.4 GS compliance please see www.vishay.com/doc 99912 0.045 at V = 1.2 V 5 GS APPLICATIONS D Mobile computing, smart phones, MICRO FOOT 1.6 x 1.6 D tablet PCs 2 D - Load switch 3 - Low voltage drop switch G 1 G 4 1 S Backside View Bump Side View S Marking Code: 8424C N-Channel MOSFET Ordering Information: Si8424CDB-T1-E1 (Lead (Pb)-free and halogen-free) ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) A PARAMETER SYMBOL LIMITUNIT Drain-Source Voltage V 8 DS V 5 Gate-Source Voltage V GS a T = 25 C 10 A a T = 70 C 8 A Continuous Drain Current (T = 150 C) I J D b T = 25 C 6.3 A b T = 70 C 5.1 A A Pulsed Drain Current (t = 300 s) I 25 DM a T = 25 C 2.3 A Continuous Source-Drain Diode Current I S b T = 25 C 0.92 A a T = 25 C 2.7 A a T = 70 C 1.8 A Maximum Power Dissipation P W D b T = 25 C 1.1 A b T = 70 C 0.73 A Operating Junction and Storage Temperature Range T , T -55 to +150 J stg V 260 C PR c Package Reflow Conditions IR / convection 260 Notes a. Surface mounted on 1 x 1 FR4 board with full copper, t = 5 s. b. Surface mounted on 1 x 1 FR4 board with minimum copper, t = 5 s. c. Refer to IPC / JEDEC (J-STD-020), no manual or hand soldering. d. In this document, any reference to case represents the body of the MICRO FOOT device and foot is the bump. e. Based on T = 25 C. A S15-1692-Rev. C, 20-Jul-15 Document Number: 63894 1 For technical questions, contact: pmostechsupport vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000 8424C xxx 1.6 mmSi8424CDB www.vishay.com Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYPICALMAXIMUMUNIT a, b Maximum Junction-to-Ambient t = 5 s R 35 45 thJA C/W c, d Maximum Junction-to-Ambient t = 5 s R 85 110 thJA Notes a. Surface mounted on 1 x 1 FR4 board with full copper, t = 5 s. b. Maximum under steady state conditions is 85 C/W. c. Surface mounted on 1 x 1 FR4 board with minimum copper, t = 5 s. d. Maximum under steady state conditions is 175 C/W. SPECIFICATIONS (T = 25 C, unless otherwise noted) J PARAMETER SYMBOL TEST CONDITIONS MIN.TYP.MAX.UNIT Static Drain-Source Breakdown Voltage V V = 0 V, I = 250 A 8 - - V DS GS D V Temperature Coefficient V /T -3- DS DS J I = 250 A mV/C D V Temperature Coefficient VG /T --2.6 - GS(th) S(th) J Gate-Source Threshold Voltage V V = V , I = 250 A 0.35 - 0.8 V GS(th) DS GS D Gate-Source Leakage I V = 0 V, V = 5 V - - 100 nA GSS DS GS V = 8 V, V = 0 V - - 1 DS GS Zero Gate Voltage Drain Current I A DSS V = 8 V, V = 0 V, T = 70 C - - 10 DS GS J a On-State Drain Current I V 5 V, V = 4.5 V 5 - - A D(on) DS GS V = 4.5 V, I = 2 A - 0.015 0.020 GS D V = 2.5 V, I = 1 A - 0.016 0.021 GS D a Drain-Source On-State Resistance R V = 1.8 V, I = 1 A - 0.017 0.023 DS(on) GS D V = 1.5 V, I = 1 A - 0.018 0.028 GS D V = 1.2 V, I = 0.5 A - 0.022 0.045 GS D a Forward Transconductance g V = 4 V, I = 2 A - 30 - S fs DS D b Dynamic Input Capacitance C - 2340 - iss Output Capacitance C V = 4 V, V = 0 V, f = 1 MHz - 870 - pF oss DS GS Reverse Transfer Capacitance C - 600 - rss Total Gate Charge Q -25 40 g Gate-Source Charge Q V = 4 V, V = 4.5 V, I = 2 A -3.3 - nC gs DS GS D Gate-Drain Charge Q -3.6 - gd Gate Resistance R V = 0.1 V, f = 1 MHz - 3.5 - g GS Turn-On Delay Time t -13 30 d(on) Rise Time t -19 40 r V = 4 V, R = 2 DD L ns I 2 A, V = 4.5 V, R = 1 Turn-Off Delay Time t -7D GEN g 3150 d(off) Fall Time t -20 40 f Drain-Source Body Diode Characteristics c Continuous Source-Drain Diode I T = 25 C - - 2.3 S A A Pulse Diode Forward Current I -- 25 SM Body Diode Voltage V I = 2 A, V = 0 V - 0.7 1.2 V SD S GS Body Diode Reverse Recovery Time t -40 80 ns rr Body Diode Reverse Recovery Charge Q -20 40 nC rr I = 2 A, dI/dt = 100 A/s, T = 25 C F J Reverse Recovery Fall Time t -15- a ns Reverse Recovery Rise Time t -25- b Notes a. Pulse test pulse width 300 s, duty cycle 2 %. b. Guaranteed by design, not subject to production testing. c. Surface mounted on 1 x 1 FR4 board with full copper, t = 5 s Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. S15-1692-Rev. C, 20-Jul-15 Document Number: 63894 2 For technical questions, contact: pmostechsupport vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000