New Product SiZ900DT Vishay Siliconix Dual N-Channel 30 V (D-S) MOSFETs FEATURES PRODUCT SUMMARY Halogen-free According to IEC 61249-2-21 Definition V (V) R ( )I (A) Q (Typ.) DS DS(on) D g TrenchFET Power MOSFETs a 0.0072 at V = 10 V GS 24 100 % R and UIS Tested g Channel-1 30 13.5 nC a 0.0092 at V = 4.5 V Compliant to RoHS Directive 2002/95/EC GS 24 a APPLICATIONS 0.0039 at V = 10 V GS 28 Channel-2 30 34 nC Notebook System Power a 0.0047 at V = 4.5 V GS 28 POL Synchronous Buck Converter D 1 PowerPAIR 6 x 5 Pin 1 G 1 5 mm D 1 1 G 1 D 1 2 D N-Channel 1 D 1 1 3 S /D MOSFET 1 2 4 G 2 S /D 1 2 S 2 Pin 9 8 S 2 7 G 6 mm 2 S 2 6 5 N-Channel 2 MOSFET S 2 Ordering Information: SiZ900DT-T1-GE3 (Lead (Pb)-free and Halogen-free) ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) A Parameter Symbol Channel-1Channel-2Unit V 30 Drain-Source Voltage DS V V 20 Gate-Source Voltage GS a a T = 25 C 24 28 C a a T = 70 C 24 28 C I Continuous Drain Current (T = 150 C) D J b, c b, c T = 25 C A 19 28 b, c b, c T = 70 C A 15.5 22 A I Pulsed Drain Current 90 110 DM a a T = 25 C 24 C 28 Continuous Source Drain Diode Current I S b, c b, c T = 25 C A 3.8 4.3 I Single Pulse Avalanche Current 20 35 AS L = 0.1 mH E Single Pulse Avalanche Energy 20 61 mJ AS T = 25 C 48 100 C T = 70 C 31 64 C Maximum Power Dissipation P W D b, c b, c T = 25 C A 4.6 5.2 b, c b, c T = 70 C 3 3.3 A T , T Operating Junction and Storage Temperature Range - 55 to 150 J stg C d, e Soldering Recommendations (Peak Temperature) 260 THERMAL RESISTANCE RATINGS Channel-1 Channel-2 Parameter Symbol Typ. Max. Typ. Max. Unit b, f t 10 s R 22 27 19 24 Maximum Junction-to-Ambient thJA C/W R Maximum Junction-to-Case (Drain) Steady State 2.1 2.6 1 1.25 thJC Notes: a. Package limited. b. Surface mounted on 1 x 1 FR4 board. c. t = 10 s. d. See solder profile (www.vishay.com/doc 73257). The PowerPAIR is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components. f. Maximum under steady state conditions is 62 C/W for channel-1 and 55 C/W for channel-2. Document Number: 67344 www.vishay.com S11-2380-Rev. C, 28-Nov-11 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000New Product SiZ900DT Vishay Siliconix SPECIFICATIONS (T = 25 C, unless otherwise noted) J Parameter Symbol Test Conditions Min. Typ.Max.Unit Static V = 0 V, I = 250 A Ch-1 30 GS D V Drain-Source Breakdown Voltage V DS V = 0 V, I = 250 A Ch-2 30 GS D I = 250 A Ch-1 32 D V Temperature Coefficient V /T DS DS J I = 250 A Ch-2 32 D mV/C I = 250 A Ch-1 - 6 D V Temperature Coefficient V /T GS(th) GS(th) J I = 250 A Ch-2 - 6.5 D V = V , I = 250 A Ch-1 1.2 2.4 DS GS D V Gate Threshold Voltage V GS(th) V = V , I = 250 A Ch-2 1 2.2 DS GS D Ch-1 100 I V = 0 V, V = 20 V Gate Source Leakage nA GSS DS GS Ch-2 100 V = 30 V, V = 0 V Ch-1 1 DS GS V = 30 V, V = 0 V Ch-2 1 DS GS I Zero Gate Voltage Drain Current A DSS V = 30 V, V = 0 V, T = 55 C Ch-1 5 DS GS J V = 30 V, V = 0 V, T = 55 C Ch-2 5 DS GS J V 5 V, V = 10 V Ch-1 20 DS GS b I A On-State Drain Current D(on) V 5 V, V = 10 V Ch-2 25 DS GS V = 10 V, I = 19.4 A Ch-1 0.0059 0.0072 GS D V = 10 V, I = 20 A Ch-2 0.0032 0.0039 GS D b R Drain-Source On-State Resistance DS(on) V = 4.5 V, I = 17.2 A Ch-1 0.0075 0.0092 GS D V = 4.5 V, I = 20 A Ch-2 0.0038 0.0047 GS D V = 10 V, I = 19.4 A Ch-1 76 DS D b g S Forward Transconductance fs V = 10 V, I = 20 A Ch-2 120 DS D a Dynamic Ch-1 1830 C Input Capacitance iss Channel-1 Ch-2 4900 V = 15 V, V = 0 V, f = 1 MHz DS GS Ch-1 300 C Output Capacitance pF oss Ch-2 710 Channel-2 Ch-1 120 V = 15 V, V = 0 V, f = 1 MHz DS GS C Reverse Transfer Capacitance rss Ch-2 280 V = 15 V, V = 10 V, I = 19.4 A Ch-1 29 45 DS GS D V = 15 V, V = 10 V, I = 20 A Ch-2 73 110 DS GS D Total Gate Charge Q g Ch-1 13.5 21 Channel-1 Ch-2 34 51 nC V = 15 V, V = 4.5 V, I = 19.4 A DS GS D Ch-1 5.8 Q Gate-Source Charge gs Ch-2 15 Channel-2 Ch-1 3.1 V = 15 V, V = 4.5 V, I = 20 A DS GS D Q Gate-Drain Charge gd Ch-2 7.3 Ch-1 0.5 2.4 4.8 R Gate Resistance f = 1 MHz g Ch-2 0.2 0.9 1.8 Notes: a. Guaranteed by design, not subject to production testing. b. Pulse test pulse width 300 s, duty cycle 2 %. www.vishay.com Document Number: 67344 2 S11-2380-Rev. C, 28-Nov-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000