6.15 mm6.15 mm SQJ202EP www.vishay.com Vishay Siliconix Automotive Dual N-Channel 12 V (D-S) 175 C MOSFETs FEATURES PRODUCT SUMMARY TrenchFET power MOSFET N-CHANNEL 1 N-CHANNEL 2 d AEC-Q101 qualified V (V) 12 12 DS 100 % R and UIS tested g R () at V = 10 V 0.0065 0.0033 DS(on) GS R () at V = 4.5 V 0.0093 0.0045 Material categorization: DS(on) GS for definitions of compliance please see I (A) 20 60 D www.vishay.com/doc 99912 Configuration Dual N Package PowerPAK SO-8L Dual Asymmetric D D 1 2 PowerPAK SO-8L Dual Asymmetric D 1 G G 1 2 D 2 1 S 1 2 G 1 3 S S 1 2 S 2 4 11 N-Channel 1 MOSFET N-Channel 2 MOSFET G 2 Top View Bottom View ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) C PARAMETER SYMBOL N-CHANNEL 1 N-CHANNEL 2 UNIT Drain-Source Voltage V 12 12 DS V Gate-Source Voltage V 20 GS T = 25 C 20 60 C a Continuous Drain Current I D T = 125 C 20 60 C a Continuous Source Current (Diode Conduction) I 20 44 A S b Pulsed Drain Current I 80 180 DM Single Pulse Avalanche Current I 18 18 AS L = 0.1 mH Single Pulse Avalanche Energy E 16.2 16.2 mJ AS T = 25 C 27 48 C b Maximum Power Dissipation P W D T = 125 C 9 16 C Operating Junction and Storage Temperature Range T , T -55 to +175 J stg C e, f Soldering Recommendations (Peak Temperature) 260 THERMAL RESISTANCE RATINGS PARAMETER SYMBOL N-CHANNEL 1 N-CHANNEL 2 UNIT c Junction-to-Ambient PCB Mount R 85 85 thJA C/W Junction-to-Case (Drain) R 5.5 3.1 thJC Notes a. Package limited. b. Pulse test pulse width 300 s, duty cycle 2 %. c. When mounted on 1 square PCB (FR4 material). d. Parametric verification ongoing. e. See solder profile (www.vishay.com/doc 73257). The PowerPAK SO-8L is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. f. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components. S15-2474-Rev. A, 19-Oct-15 Document Number: 62926 1 For technical questions, contact: automostechsupport vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000 55.13 mm13 mmSQJ202EP www.vishay.com Vishay Siliconix SPECIFICATIONS (T = 25 C, unless otherwise noted) C PARAMETER SYMBOL TEST CONDITIONS MIN.TYP.MAX.UNIT Static V = 0 V, I = 250 A N-Ch 1 12 - - GS D Drain-Source Breakdown Voltage V DS V = 0 V, I = 250 A N-Ch 2 12 - - GS D V V = V , I = 250 A N-Ch 1 1 1.5 2 DS GS D Gate-Source Threshold Voltage V GS(th) V = V , I = 250 A N-Ch 2 1 1.5 2 DS GS D N-Ch 1 - - 100 Gate-Source Leakage I V = 0 V, V = 20 V nA GSS DS GS N-Ch 2 - - 100 V = 0 V V = 12 V N-Ch 1 - - 1 GS DS V = 0 V V = 12 V N-Ch 2 - - 1 GS DS V = 0 V V = 12 V, T = 125 C N-Ch 1 - - 50 GS DS J Zero Gate Voltage Drain Current I A DSS V = 0 V V = 12 V, T = 125 C N-Ch 2 - - 50 GS DS J V = 0 V V = 12 V, T = 175 C N-Ch 1 - - 500 GS DS J V = 0 V V = 12 V, T = 175 C N-Ch 2 - - 500 GS DS J V = 10 V V 5 V N-Ch 1 20 - - GS DS a On-State Drain Current I A D(on) V = 10 V V 5 V N-Ch 2 30 - - GS DS V = 10 V I = 15 A N-Ch 1 - 0.0052 0.0065 GS D V = 10 V I = 20 A N-Ch 2 - 0.0025 0.0033 GS D V = 10 V I = 15 A, T = 125 C N-Ch 1 - 0.0075 - GS D J V = 10 V I = 20 A, T = 125 C N-Ch 2 - 0.0031 - GS D J a Drain-Source On-State Resistance R DS(on) V = 10 V I = 15 A, T = 175 C N-Ch 1 - 0.0085 - GS D J V = 10 V I = 20 A, T = 175 C N-Ch 2 - 0.0038 - GS D J V = 4.5 V I = 13 A N-Ch 1 - 0.0075 0.0093 GS D V = 4.5 V I = 18 A N-Ch 2 - 0.0034 0.0045 GS D V = 10 V, I = 15 A N-Ch 1 - 49 - DS D b Forward Transconductance g S fs V = 10 V, I = 20 A N-Ch 2 - 91 - DS D b Dynamic V = 0 V V = 6 V, f = 1 MHz N-Ch 1 - 777 975 GS DS Input Capacitance C iss V = 0 V V = 6 V, f = 1 MHz N-Ch 2 - 2018 2525 GS DS V = 0 V V = 6 V, f = 1 MHz N-Ch 1 - 539 675 GS DS Output Capacitance C pF oss V = 0 V V = 6 V, f = 1 MHz N-Ch 2 - 1313 1645 GS DS V = 0 V V = 6 V, f = 1 MHz N-Ch 1 - 270 340 GS DS Reverse Transfer Capacitance C rss V = 0 V V = 6 V, f = 1 MHz N-Ch 2 - 683 855 GS DS V = 10 V V = 6 V, I = 20 A N-Ch 1 - 14.5 22 GS DS D c Total Gate Charge Q g V = 10 V V = 6 V, I = 60 A N-Ch 2 - 35.9 54 GS DS D V = 10 V V = 6 V, I = 20 A N-Ch 1 - 1.7 - GS DS D nC c Gate-Source Charge Q gs V = 10 V V = 6 V, I = 60 A N-Ch 2 - 4.1 - GS DS D V = 10 V V = 6 V, I = 20 A N-Ch 1 - 2.1 - GS DS D c Gate-Drain Charge Q gd V = 10 V V = 6 V, I = 60 A N-Ch 2 - 4.3 - GS DS D N-Ch 1 1.3 2.6 4 Gate Resistance R f = 1 MHz g N-Ch 2 0.5 1.1 1.7 Notes a. Pulse test pulse width 300 s, duty cycle 2 %. b. Guaranteed by design, not subject to production testing. c. Independent of operating temperature. S15-2474-Rev. A, 19-Oct-15 Document Number: 62926 2 For technical questions, contact: automostechsupport vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000