X-On Electronics has gained recognition as a prominent supplier of W29N04GVSIAA NAND Flash across the USA, India, Europe, Australia, and various other global locations. W29N04GVSIAA NAND Flash are a product manufactured by Winbond. We provide cost-effective solutions for NAND Flash, ensuring timely deliveries around the world.

W29N04GVSIAA Winbond

W29N04GVSIAA electronic component of Winbond
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Part No.W29N04GVSIAA
Manufacturer: Winbond
Category: NAND Flash
Description: NAND Flash 4G-bit NAND flash, 3V x 8bit
Datasheet: W29N04GVSIAA Datasheet (PDF)
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)
N/A

Obsolete
Availability Price Quantity
0
MOQ : 96
Multiples : 96
96 : USD 7.4092
288 : USD 7.1185
480 : USD 6.9612
960 : USD 6.7629
N/A

Obsolete
0
MOQ : 96
Multiples : 96
96 : USD 7.5061
288 : USD 6.9214
576 : USD 6.676
N/A

Obsolete
   
Manufacturer
Product Category
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We are delighted to provide the W29N04GVSIAA from our NAND Flash category, at competitive rates not only in the United States, Australia, and India, but also across Europe and beyond. A long established and extensive electronic component distribution network has enhanced our global reach and dependability, ensuring cost savings through prompt deliveries worldwide. Client satisfaction is at the heart of our business, where every component counts and every customer matters. Our technical service team is ready to assist you. From product selection to after-sales support, we strive to deliver a seamless and satisfying experience. Are you ready to experience the best in electronic component distribution? Contact X-ON Electronics today and discover why X-On are a preferred choice for the W29N04GVSIAA and other electronic components in the NAND Flash category and beyond.

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W29N04GV W29N04GV 4G-BIT 3.3V NAND FLASH MEMORY th Release Date: December 12 , 2017 1 Revision C W29N04GV Table of Contents 1. GENERAL DESCRIPTION ............................................................................................................ 7 2. FEATURES .................................................................................................................................... 7 3. PACKAGE TYPES AND PIN CONFIGURATIONS ....................................................................... 8 3.1 Pin assignment 48-pin TSOP1(x8) ....................................................................................... 8 3.2 Pin assignment 63 ball VFBGA (x8) ..................................................................................... 9 3.3 Pin Descriptions .................................................................................................................. 10 4. PIN DESCRITPIONS ................................................................................................................... 11 4.1 Chip Enable ( CE) .............................................................................................................. 11 4.2 Write Enable ( WE) ............................................................................................................ 11 4.3 Read Enable ( RE) ............................................................................................................. 11 4.4 Address Latch Enable (ALE) .............................................................................................. 11 4.5 Command Latch Enable (CLE) ........................................................................................... 11 4.6 Write Protect ( WP) ............................................................................................................ 11 4.7 Ready/Busy (RY/ BY) ........................................................................................................ 11 4.8 Input and Output (I/Ox) ....................................................................................................... 11 5. BLOCK DIAGRAM ....................................................................................................................... 12 6. MEMORY ARRAY ORGANIZATION ........................................................................................... 13 6.1 Array Organization (x8) ....................................................................................................... 13 7. MODE SELECTION TABLE ........................................................................................................ 14 8. COMMAND TABLE ...................................................................................................................... 15 9. DEVICE OPERATIONS ............................................................................................................... 17 9.1 READ operation .................................................................................................................. 17 9.1.1 PAGE READ (00h-30h) ........................................................................................................ 17 9.1.2 CACHE READ OPERATIONS .............................................................................................. 17 9.1.3 TWO PLANE READ (00h-00h-30h) ...................................................................................... 21 9.1.4 RANDOM DATA OUTPUT (05h-E0h) ................................................................................... 23 9.1.5 READ ID (90h) ...................................................................................................................... 25 9.1.6 READ PARAMETER PAGE (ECh) ....................................................................................... 26 9.1.7 READ STATUS (70h) ........................................................................................................... 28 9.1.8 READ STATUS ENHANCED (78h) ...................................................................................... 30 9.1.9 READ UNIQUE ID (EDh) ...................................................................................................... 31 9.2 PROGRAM operation ......................................................................................................... 32 9.2.1 PAGE PROGRAM (80h-10h) ................................................................................................ 32 9.2.2 SERIAL DATA INPUT (80h) ................................................................................................. 32 9.2.3 RANDOM DATA INPUT (85h) .............................................................................................. 33 9.2.4 CACHE PROGRAM (80h-15h) ............................................................................................. 33 9.2.5 TWO PLANE PAGE PROGRAM .......................................................................................... 35 9.3 COPY BACK operation ....................................................................................................... 38 9.3.1 READ for COPY BACK (00h-35h) ........................................................................................ 38 9.3.2 PROGRAM for COPY BACK (85h-10h) ................................................................................ 38 9.3.3 TWO PLANE READ for COPY BACK ................................................................................... 39 9.3.4 TWO PLANE PROGRAM for COPY BACK .......................................................................... 39 9.4 BLOCK ERASE operation .................................................................................................. 43 th Release Date: December 12 , 2017 2 Revision C

Tariff Desc

8542.32.00 32 No ..CMOS and MOS Read Only Memory and Programmable Read Only Memory whether erasable or non-erasable (for example, flash memory, EPROM, E2PROM, EAPROM, NOVRAM, ROM and PROM)
WINBOND ELECTRONICS
WINBOND ELECTRONICS CORP AMERICA
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