ADVANCED LINEAR DEVICES, INC. ALD1107/ALD1117 QUAD/DUAL P-CHANNEL MATCHED PAIR MOSFET ARRAY GENERAL DESCRIPTION APPLICATIONS The ALD1107/ALD1117 are monolithic quad/dual P-channel enhance- Precision current mirrors ment mode matched MOSFET transistor arrays intended for a broad Precision current sources range of precision analog applications. The ALD1107/ALD1117 offer Voltage choppers high input impedance and negative current temperature coefficient. The Differential amplifier input stage transistor pairs are matched for minimum offset voltage and differential Voltage comparator thermal response, and they are designed for precision analog switching Data converters and amplifying applications in -2V to -10V systems where low input bias Sample and Hold current, low input capacitance and fast switching speed are desired. Analog signal processing These MOSFET devices feature very large (almost infinite) current gain in a low frequency, or near DC, operating environment. The ALD1107/ ALD1117 are building blocks for differential amplifier input stages, PIN CONFIGURATION transmission gates, multiplexer applications, current sources and many precision analog circuits. ALD1117 D 1 8 D FEATURES P1 P2 Low threshold voltage of -0.7V G 2 7 G P1 P2 Low input capacitance Low Vos -- 2mV typical S 3 6 S P1 P2 14 typical High input impedance -- 10 Negative current (I ) temperature coefficient DS - + V 4 5 V Enhancement-mode (normally off) 9 DC current gain 10 TOP VIEW SAL, PAL PACKAGES Low input and output leakage currents RoHS compliant ALD1107 ORDERING INFORMATION (L suffix denotes lead-free (RoHS)) D 1 14 D P1 P2 Operating Temperature Range* G 2 13 G P2 P1 0C to +70C 0C to +70C S 3 12 S P1 P2 8-Pin SOIC 8-Pin Plastic Dip - 4 + Package Package V 11 V 5 D 10 D ALD1117SAL ALD1117PAL P4 P3 6 9 G G P3 P4 14-Pin SOIC 14-Pin Plastic Dip Package Package S 7 8 S P4 P3 ALD1107SBL ALD1107PBL TOP VIEW SBL, PBL PACKAGES * Contact factory for high temperature versions. BLOCK DIAGRAMS ALD1107 ALD1117 - V (4) - V (4) D (1) D (14) D (5) D (8) P1 P2 D (10) P4 D (1) P2 P3 P1 ~ ~ G (2) G (13) G (9) G (6) G (2) G (7) P1 P2 P3 P4 P1 P2 + + + V (5) V V S (3) S (6) S (3) S (12) S (8) S (7) P1 P2 P1 P2 P3 P4 (11) (11) 2021 Advanced Linear Devices, Inc., Vers. 2.2 www.aldinc.com 1 of 9ABSOLUTE MAXIMUM RATINGS Drain-source voltage, V -10V DS Gate-source voltage, V -10V GS Power dissipation 500mW Operating temperature range SAL, PAL, SBL, PBL packages 0C to +70C Storage temperature range -65C to +150C Lead temperature, 10 seconds +260C CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment. OPERATING ELECTRICAL CHARACTERISTICS T = 25C unless otherwise specified A ALD1107 ALD1117 Test Parameter Symbol Min Typ Max Min Typ Max Unit Conditions Gate Threshold V -0.4 -0.7 -1.2 -0.4 -0.7 -1.2 V I = -1.0A V = V T DS GS DS Voltage Offset Voltage V 2 10 2 10 mV I = -10A V = V OS DS GS DS V -V GS1 GS2 Gate Threshold Temperature TC -1.3 -1.3 mV/C VT 2 Drift On Drain I -1.3 -2 -1.3 -2 mA V = V = -5V DS(ON) GS DS Current Transconductance G 0.25 0.67 0.25 0.67 mmho V = -5V I = -10mA IS DS DS Mismatch G 0.5 0.5 % fs Output G 40 40 mho V = -5V I = -10mA OS DS DS Conductance Drain Source R 1200 1800 1200 1800 V = -0.1V V = -5V DS(ON) DS GS On Resistance Drain Source On Resistence 0.5 0.5 % V = -0.1V V = -5V DS(ON) DS GS Mismatch Drain Source Breakdown BV -10 -10 V I = -1.0A V = 0V DSS DS GS Voltage Off Drain I 10 400 10 400 pA V = -10V V = 0V DS(OFF) DS GS 1 Current 44nAT = 125C A Gate Leakage I 1 100 1 100 pA V = 0V V = -10V GSS DS GS Current 1 1 nA T = 125C A Input C 13 1 3 pF ISS 2 Capacitance 1 Notes: Consists of junction leakage currents 2 Sample tested parameters ALD1107/ALD1117 Advanced Linear Devices 2 of 9