e TM ADVANCED EPAD LINEAR DEVICES, INC. ALD110802/ALD110902 QUAD/DUAL N-CHANNEL ENHANCEMENT MODE EPAD V = +0.20V GS(th) PRECISION MATCHED PAIR MOSFET ARRAY GENERAL DESCRIPTION APPLICATIONS ALD110802/ALD110902 are high precision monolithic quad/dual enhance- Ultra low power (nanowatt) analog and digital ment mode N-Channel MOSFETS matched at the factory using ALDs circuits proven EPAD CMOS technology. These devices are intended for low volt- Ultra low operating voltage (<0.20V) circuits age, small signal applications. The ALD110802/ALD110902 MOSFETS are Sub-threshold biased and operated circuits designed and built for exceptional device electrical characteristics match- Precision current mirrors and current sources ing. Since these devices are on the same monolithic chip, they also exhibit Nano-Amp current sources excellent tempco tracking characteristics. They are versatile circuit elements High impedance resistor simulators useful as design components for a broad range of analog applications, Capacitive probes and sensor interfaces such as basic building blocks for current sources, differential amplifier input Differential amplifier input stages stages, transmission gates, and multiplexer applications. For most applica- Discrete Voltage comparators and level shifters tions, connect the V+ pin to the most positive voltage and the V- and IC Voltage bias circuits pins to the most negative voltage in the system. All other pins must have Sample and Hold circuits voltages within these voltage limits at all times. Analog and digital inverters Charge detectors and charge integrators The ALD110802/ALD110902 devices are built for minimum offset voltage Source followers and High Impedance buffers and differential thermal response, and they are suited for switching and Current multipliers amplifying applications in <+0.1V to +10V systems where low input bias Discrete Analog switches / multiplexers current, low input capacitance and fast switching speed are desired, as these devices exhibit well controlled turn-off and sub-threshold character- istics and can be biased and operated in the sub-threshold region. Since PIN CONFIGURATION these are MOSFET devices, they feature very large (almost infinite) cur- rent gain in a low frequency, or near DC, operating environment. ALD110802 The ALD110802/ALD110902 are suitable for use in very low operating volt- - - V V age or very low power (nanowatt), precision applications which require very IC* 1 16 IC* high current gain, beta, such as current mirrors and current sources. The high input impedance and the high DC current gain of the Field Effect Tran- G 2 15 G N2 N1 sistors result from extremely low current loss through the control gate. The M 1 M 2 3 14 D DC current gain is limited by the gate input leakage current, which is speci- D N2 N1 fied at 30pA at room temperature. For example, DC beta of the device at a + + 13 S 4 V V 12 drain current of 3mA, input leakage current of 30pA, and 25C is 3mA/30pA = 100,000,000. - - 5 V 12 V S 34 D 6 11 D FEATURES N4 M 4 M 3 N3 G 7 10 G N4 N3 Enhancement-mode (normally off) Precision Gate Threshold Voltage of +0.20V 8 9 IC* IC* - - V V Matched MOSFET-to-MOSFET characteristics Tight lot-to-lot parametric control Low input capacitance SCL, PCL PACKAGES V match (V ) to 10mV GS(th) OS 12 High input impedance 10 typical ALD110902 Positive, zero, and negative V temperature coefficient GS(th) 8 DC current gain >10 - - V V Low input and output leakage currents 1 8 IC* IC* G G 2 7 N1 N2 ORDERING INFORMATION (L suffix denotes lead-free (RoHS)) M 1 M 2 D 3 6 D N1 N2 Operating Temperature Range* - - S 4 V 0C to +70C0C to +70C 12 V 5 16-Pin 16-Pin 8-Pin 8-Pin SAL, PAL PACKAGES SOIC Plastic Dip SOIC Plastic Dip Package Package Package Package *IC pins are internally connected. Connect to V- ALD110802SCL ALD110802PCL ALD110902SAL ALD110902PAL * Contact factory for industrial temp. range or user-specified threshold voltage values. 2016 Advanced Linear Devices, Inc., Vers. 2.3 www.aldinc.com 1 of 12 E N A D E L BABSOLUTE MAXIMUM RATINGS Drain-Source voltage, V 10.6V DS Gate-Source voltage, V 10.6V GS Power dissipation 500 mW Operating temperature range SCL, PCL, SAL, PAL 0C to +70C Storage temperature range -65C to +150C Lead temperature, 10 seconds +260C CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment. OPERATING ELECTRICAL CHARACTERISTICS + - V = +5V V = GND T = 25C unless otherwise specified A ALD110802/ALD110902 Parameter Symbol Min Typ Max Unit Test Conditions Gate Threshold Voltage V 0.18 0.20 0.22 V I = 1A, V = 0.1V GS(th) DS DS Offset Voltage V 210 mV OS V -V GS(th)1 GS(th)2 Offset VoltageTempco TC 5 V/ CV = V VOS DS1 DS2 Gate Threshold Voltage TC -1.7 mV/ CI = 1A, V = 0.1V VGS(th) DS DS Tempco 0.0 I = 20A, V = 0.1V DS DS +1.6 I = 40A, V = 0.1V DS DS Drain Source On Current I 12.0 mA V = +9.7V, V = +5V DS(ON) GS DS 3.0 V = +4.2V, V = +5V GS DS Forward Transconductance G 1.4 mmho V = +4.2V FS GS V = +9.2V DS Transconductance Mismatch G 1.8 % FS Output Conductance G 68 mho V = +4.2V OS GS V = +9.2V DS Drain Source On Resistance R 500 V = +4.2V DS(ON) GS V = +0.1V DS Drain Source On Resistance R 0.5 % DS(ON) Mismatch - Drain Source Breakdown BV 10 V V = V = -0.8V DSX GS Voltage I = 1.0A DS 1 Drain Source Leakage Current I 10 400 pA V = -0.8V, V =+5V DS(OFF) GS DS - V = -5V 4nA T = 125C A 1 Gate Leakage Current I 3 200 pA V = +5V, V = 0V GSS GS DS 1nA T =125C A Input Capacitance C 2.5 pF ISS Transfer Reverse Capacitance C 0.1 pF RSS + Turn-on Delay Time t 10 ns V = 5V, R = 5K on L + Turn-off Delay Time t 10 ns V = 5V, R = 5K off L Crosstalk 60 dB f = 100KHz 1 Notes: Consists of junction leakage currents ALD110802/ALD110902, Vers. 2.3 Advanced Linear Devices 2 of 12