e TM ADVANCED EPAD LINEAR DEVICES, INC. ALD210800A/ALD210800 PRECISION N-CHANNEL EPAD MOSFET ARRAY V = +0.00V GS(th) QUAD HIGH DRIVE ZERO THRESHOLD MATCHED PAIR FEATURES & BENEFITS GENERAL DESCRIPTION + The ALD210800A/ALD210800 precision N-Channel EPAD MOSFET array is Zero Threshold V = 0.00V 0.01V GS(th) V (V match) to 2mV/10mV max. precision matched at the factory using ALDs proven EPAD CMOS technology. OS GS(th) Sub-threshold voltage (nano-power) operation These quad monolithic devices are enhanced additions to the ALD110800A/ < 100mV min. operating voltage ALD110800 EPAD MOSFET Family, with increased forward transconductance and output conductance, particularly at very low supply voltages. < 1nA min. operating current < 1nW min. operating power > 100,000,000:1 operating current ranges Intended for low voltage, low power small signal applications, the ALD210800A/ High transconductance and output conductance ALD210800 features Zero-Threshold voltage, which enables circuit designs with input/output signals referenced to GND at enhanced operating voltage Low R of 25 DS(ON) ranges. With these devices, a circuit with multiple cascading stages can be Output current > 50mA built to operate at extremely low supply/bias voltage levels. For example, a Matched and tracked tempco Tight lot-to-lot parametric control nanopower input amplifier stage operating at less than 0.2V supply voltage has been successfully built with these devices. Positive, zero, and negative V tempco GS(th) Low input capacitance and leakage currents ALD210800A EPAD MOSFETs feature exceptional matched pair device electri- cal characteristics of Gate Threshold Voltage V set precisely at 0.00V GS(th) APPLICATIONS + + 0.01V, I = +10A V = 0.1V, with a typical offset voltage of only 0.001V DS DS (1mV). Built on a single monolithic chip, they also exhibit excellent temperature Low overhead current mirrors and current sources tracking characteristics. These precision devices are versatile as design com- Zero Power Normally-On circuits ponents for a broad range of analog small signal applications such as basic Energy harvesting detectors building blocks for current mirrors, matching circuits, current sources, differen- Very low voltage analog and digital circuits tial amplifier input stages, transmission gates, and multiplexers. They also ex- Zero power fail-safe circuits cel in limited operating voltage applications, such as very low level voltage- Backup battery circuits & power failure detector clamps and nano-power normally-on circuits. Extremely low level voltage-clamps Extremely low level zero-crossing detectors In addition to precision matched-pair electrical characteristics, each individual Matched source followers and buffers EPAD MOSFET also exhibits well controlled manufacturing characteristics, en- Precision current mirrors and current sources abling the user to depend on tight design limits from different production batches. Matched capacitive probes and sensor interfaces These devices are built for minimum offset voltage and differential thermal re- Charge detectors and charge integrators sponse, and they can be used for switching and amplifying applications in +0.1V High gain differential amplifier input stage + + to +10V ( 0.05V to 5V) powered systems where low input bias current, low Matched peak-detectors and level-shifters input capacitance, and fast switching speed are desired. At V > 0.00V, the DS Multiple Channel Sample-and-Hold switches device exhibits enhancement mode characteristics whereas at V < 0.00V the GS Precision Current multipliers device operates in the subthreshold voltage region and exhibits conventional Discrete matched analog switches/multiplexers depletion mode characteristics, with well controlled turn-off and sub-threshold Nanopower discrete voltage comparators levels that operate the same as standard enhancement mode MOSFETs. 10 The ALD210800A/ALD210800 features high input impedance (2.5 x 10 ) and PIN CONFIGURATION 8 high DC current gain (>10 ). A sample calculation of the DC current gain at a drain output current of 30mA and input current of 300pA at 25C is 30mA/300pA = 100,000,000, which translates into a dynamic operating current range of about ALD210800 eight orders of magnitude. A series of four graphs titled Forward Transfer Char- nd rd acteristics, with the 2 and 3 sub-titled expanded (subthreshold) and fur- th ther expanded (subthreshold), and the 4 sub-titled low voltage, illustrates 1 IC* 16 IC* the wide dynamic operating range of these devices. M 1 M 2 D N1 2 15 D N2 Generally it is recommended that the V+ pin be connected to the most positive voltage and the V- and IC (internally-connected) pins to the most negative volt- G N1 3 14 G N2 age in the system. All other pins must have voltages within these voltage limits - - at all times. Standard ESD protection facilities and handling procedures for static V V 4 S 13 S sensitive devices are highly recommended when using these devices. N1 N2 - - + + V 12 V 5 V V ORDERING INFORMATION (L suffix denotes lead-free (RoHS)) M 4 M 3 D N4 6 11 D N3 Operating Temperature Range * 0C to +70C G N4 7 10 G N3 16-Pin SOIC Package 16-Pin Plastic Dip Package - - V V S 8 9 S N4 N3 ALD210800ASCL ALD210800APCL ALD210800SCL ALD210800PCL SCL, PCL PACKAGES *Contact factory for industrial temp. range or user-specified threshold voltage values. *IC pins are internally connected, connect to V- 2019 Advanced Linear Devices, Inc., Vers. 1.3 www.aldinc.com 1 of 12 E N A D E L BABSOLUTE MAXIMUM RATINGS Drain-Source voltage, V 10.0V DS Gate-Source voltage, V 10.0V GS Operating Current 80mA Power dissipation 500mW Operating temperature range SCL, PCL 0C to +70C Storage temperature range -65C to +150C Lead temperature, 10 seconds +260C CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment. OPERATING ELECTRICAL CHARACTERISTICS + - V = +5V V = GND T = 25C unless otherwise specified A ALD210800A ALD210800 Parameter Symbol Min Typ Max Min Typ Max Unit Test Conditions Gate Threshold Voltage V -0.01 0.00 0.01 -0.02 0.00 0.02 V I = 10A, V = 0.1V GS(th) DS DS Offset Voltage V 1.8 3.8 2 10 mV V - V OS GS(th)M1 GS(th)M2 or V - V GS(th)M3 GS(th)M4 Offset Voltage Tempco TC 55 V/CV = V VOS DS1 DS2 Gate Threshold Voltage Tempco TC -1.6 -1.6 mV/CI = 10A, V = 0.1V VGS(th) D DS 0.0 0.0 I = 380A, V = 0.1V D DS +1.6 +1.6 I = 700A, V = 0.1V D DS 70 70 mA V = +4.0V, V = +5V GS DS Drain Source On Current I DS(ON) 50 50 AV = +0.1V, V = +0.1V GS DS Forward Transconductance G 24 24 mmho V = +4.0V FS GS V = +5.0V DS Transconductance Mismatch G 1.8 1.8 % FS Output Conductance G 1.6 1.6 mmho V = +4.0V OS GS V = +5.0V DS Drain Source On Resistance R 25 25 V = +5.0V DS(ON) GS V = +0.1V DS Drain Source On Resistance R 10 10 K V = +0.0V, V = +0.1V DS(ON) GS DS 2.0 2.0 V = +0.1V, V = +0.1V GS DS Drain Source On Resistance R 1.8 1.8 % V = +5.0V DS(ON) GS Tolerance V = +0.1V DS Drain Source On Resistance R 0.6 0.6 % DS(ON) Mismatch - Drain Source Breakdown BV 10 10 V V = V = -1.0V DSX GS Voltage I = 10A DS 1 Drain Source Leakage Current I 10 400 10 400 pA V = -1.0V, V = +5V DS (OFF) GS DS - V = -5V 44nAT = 125C A 1 Gate Leakage Current I 5 200 5 200 pA V = +5V, V = 0V GSS GS DS 11nAT = 125C A Input Capacitance C 15 15 pF ISS Transfer Reverse Capacitance C 11 pF RSS + Turn-on Delay Time t 10 10 ns V = 5V, R = 5K on L + Turn-off Delay Time t 10 10 ns V = 5V, R = 5K off L Crosstalk 60 60 dB f = 100KHz 1 Notes: Consists of junction leakage currents ALD210800A/ALD210800 Advanced Linear Devices 2 of 12