e TM ADVANCED EPAD LINEAR DEVICES, INC. ALD810025/ALD910025 QUAD/DUAL SUPERCAPACITOR AUTO BALANCING (SAB ) MOSFET ARRAY GENERAL DESCRIPTION FEATURES & BENEFITS The ALD810025/ALD910025 are members of the ALD8100xx Simple and economical to use Precision factory trimmed (quad) and ALD9100xx (dual) family of Supercapacitor Auto Bal- Automatically regulates and balances leakage currents ancing MOSFETs, or SAB MOSFETs. SAB MOSFETs are built Effective for supercapacitor charge-balancing with production proven EPAD technology and are designed to ad- Balances up to 4 supercaps with a single IC package dress voltage and leakage-current balancing of supercapacitors Balances 2-cell, 3-cell, 4-cell series-connected supercaps connected in series. Supercapacitors, also known as ultracapacitors Scalable to larger supercap stacks and arrays or supercaps, connected in series can be leakage-current balanced Near zero additional leakage currents by using a combination of one or more devices connected across Zero leakage at 0.3V below rated voltages each supercapacitor stack to prevent over-voltages. Balances series and/or parallel-connected supercaps Leakage currents are exponential function of cell voltages The ALD810025 offers a set of unique, precise operating voltage Active current ranges from <0.3nA to >1000A and current characteristics for each of four SAB MOSFET devices, Always active, always fast response time as shown in its Operating Electrical Characteristics table. It can be Minimizes leakage currents and power dissipation used to balance up to four supercapacitors connected in series. The ALD910025 has its own set of unique precision Operating Elec- APPLICATIONS trical Characteristics for each of its two SAB MOSFET devices, suitable for up to two series-connected supercapacitors. Series-connected supercapacitor cell leakage balancing Energy harvesting Each SAB MOSFET features a precision gate threshold voltage in Long term backup battery with supercapacitor outputs the V mode, which is 2.50V when the gate-drain source terminals t Zero-power voltage divider at selected voltages (V = V ) are connected together at a drain-source current of Matched current mirrors and current sources GS DS I = 1A. In this mode, input voltage V = V = V Dif- Zero-power mode maximum voltage limiter DS(ON) IN GS DS. ferent V produces an Output Current I = I character- Scaled supercapacitor stacks and arrays IN OUT DS(ON) istic and results in an effective variable resistor that varies in value PIN CONFIGURATIONS exponentially with V . This V , when connected across each IN IN supercapacitor in a series, balances each supercapacitor to within ALD810025 its voltage and current limits. When V = 2.50V is applied to an ALD810025/ALD910025, its IN 16 IC* 1 IC* I is 1A. For a 100mV increase in V , to 2.60V, I increases OUT IN OUT M1 M2 by about tenfold. For an additional increase in V to 2.72V for the IN D 2 15 D N1 N2 ALD910025 (2.74V for the ALD810025), I increases one hun- OUT dredfold, to 100A. Conversely, for a 100mV decrease in V to IN 2.40V, I decreases to one tenth of its previous value, to 0.1A. G 3 14 G OUT N1 N2 Another 100mV decrease in input voltage would reduce I to OUT 0.01A. Hence, when an ALD810025/ALD910025 SAB MOSFET V- V- S S N1 13 N2 4 is connected across a supercapacitor that charges to less than 2.30V, it would dissipate essentially no power. V- 5 12 V+ (Continued on next page) M3 M4 D D N4 N3 6 11 PRODUCT FAMILY SPECIFICATIONS G G N4 7 10 N3 For more information on supercapacitor balancing, how SAB MOSFETs achieve automatic supercapacitor balancing, the device V- V- S 8 S characteristics of the SAB MOSFET family, product family product N4 9 N3 selection guide, applications, configurations, and package infor- mation, please download from www.aldinc.com the document: SCL PACKAGE ALD8100xx/ALD9100xx Family of Supercapacitor Auto Balanc- ALD910025 ing (SAB) MOSFET ARRAYs V- IC* 8 V+ 1 G 2 7 G N1 N2 ORDERING INFORMATION (L suffix denotes lead-free (RoHS)) Operating Temperature Range D D N1 3 6 N2 Package 0C to +70C -40C to +85C S N1 4 5 S V- N2, (Commercial) (Industrial) 16-Pin SOIC ALD810025SCL ALD810025SCLI SAL PACKAGE *IC pins are internally connected, connect to V- 8-Pin SOIC ALD910025SAL ALD910025SALI 2014 Advanced Linear Devices, Inc., Vers. 2.0 www.aldinc.com 1 of 6 E N A D E L BGENERAL DESCRIPTION (CONT.) APPLYING THE ALD810025/ALD910025: The voltage dependent characteristic of the ALD810025/ 1) Select a maximum supercapacitor leakage current limit for any ALD910025 on-resistance is effective in controlling excessive volt- supercapacitor used in the stack. This is the same as output cur- age rise across a supercapacitor when connected across it. In se- rent, I = I , of the ALD810025/ALD910025. Test that each OUT DS(ON) supercapacitor leakage current meets this maximum current limit ries-connected supercapacitor stacks, when one supercapacitor voltage rises, the voltage of the other supercapacitors drops, with before use in the stack. the ones that have the highest leakage currents having the lowest supercapacitor voltages. The SAB MOSFETs connected across 2) Determine whether the input voltage V (V = V ) at that IN GS DS I is acceptable for the intended application. This voltage is the these supercapacitors would exhibit complementary opposing cur- OUT rent levels, resulting in little additional leakage currents other than same voltage as the maximum desired operating voltage of the those caused by the supercapacitors themselves. supercapacitor. For example, with the ALD810025, I = 10A OUT corresponds to V = 2.60V. IN For technical assistance, please contact ALD technical support at techsupport aldinc.com. 3) Determine that the operating voltage margin, due to various tolerances and/or temperature effects, is adequate for the intended operating environment of the supercapacitor. SCHEMATIC DIAGRAM OF A TYPICAL CONNECTION FOR A FOUR-SUPERCAP STACK V+ +15.0V ALD8100XX I 80mA DS(ON) SCHEMATIC DIAGRAM OF A TYPICAL 2, 12 CONNECTION FOR A TWO-SUPERCAP STACK + 3 M1 C1 4 V+ +15.0V ALD9100XX V 1 15 I 80mA DS(ON) + 14 M2 C2 3, 8 13 + 2 V 2 C1 M1 11 + 4 10 C3 M3 V 1 9 6 + 7 V 3 C2 6 M2 + 7 C4 M4 1, 5 1, 5, 8, 16 1-16 DENOTES PACKAGE PIN NUMBERS 1-8 DENOTES PACKAGE PIN NUMBERS C1-C4 DENOTES SUPERCAPACITORS C1-C2 DENOTES SUPERCAPACITORS ALD810025/ALD910025 Advanced Linear Devices, Inc. 2 of 6