APS1604M-3SQR-SN AP Memory

APS1604M-3SQR QSPI/QPI PSRAM SPI/QPI PSRAM Specifications Features Single Supply Voltage Output Driver LVCMOS with programmable o V =2.7 to 3.6 V DD drive strengths of 50, 100 and 200 Interface: SPI/QPI with SDR mode Dedicated Wrapped Burst read and write Performance: Clock rate up to commands o 133MHz for Wrapped Burst operation at Linear 512 Length Burst is supported up to VDD=3.0V+/-10% 84MHz and can cross page boundary as long as o 109MHz for Wrapped Burst operation at tCEM is met VDD=3.3V+/-10% Register Configurable Wrap Lengths of 16, 32, o 84MHz for Linear 512 Burst operation 64 and 512 Organization: 16Mb, 2M x 8bits Toggle Command to switch between Addressable Bit Range: A 20:0 configurable wrap length and 32 bytes wrap Page Size: 512 bytes Software Reset Refresh: Self-managed Operating Temperature Range o Tc= -40C to +85C (standard range) o Tc= -40C to +105C (extended range) Maximum Standby Current o 200 A 105C o 150 A 85C o 40 A 25C APM QSPI PSRAM Datasheet.pdf - Rev. 2.7 Apr 30, 2020 1 of 32 AP Memory reserves the right to change products and/or specifications without notice 2020 AP Memory. All rights reserved APS1604M-3SQR QSPI/QPI PSRAM Table of Contents 1 Table of Contents 1 Table of Contents ............................................................................................................. 2 2 Introduction ..................................................................................................................... 4 3 Package Information ........................................................................................................ 4 3.1 Package Types : SOP / USON (SN, ZR) , not to scale, Top view .............................. 4 4 Package Outline Drawing ................................................................................................. 5 4.1 SOP-8L(150), package code SN ............................................................................... 5 4.2 USON-8L 3x2mm, package code ZR ........................................................................ 6 5 Ordering Information ....................................................................................................... 7 6 Signal Table ...................................................................................................................... 8 7 Block Diagram .................................................................................................................. 9 8 Power-Up Initialization .................................................................................................. 10 9 Interface Description ..................................................................................................... 11 9.1 Address Space ....................................................................................................... 11 9.2 Page Length ........................................................................................................... 11 9.3 Drive Strength ....................................................................................................... 11 9.4 Power-on Status .................................................................................................... 11 10 Mode Register Definition ............................................................................................... 12 11 Command/Address Latching Truth Table ...................................................................... 13 11.1 Command Termination ......................................................................................... 14 12 Mode Register Operations ............................................................................................. 15 12.1 SPI MR Read Operation ......................................................................................... 15 12.2 SPI MR Write Operation ........................................................................................ 15 12.3 QPI MR Read Operation ........................................................................................ 16 12.4 QPI MR Write Operation ....................................................................................... 16 13 Read ID ........................................................................................................................... 17 13.1 SPI Read ID Operation ........................................................................................... 17 13.2 QPI Read ID Operation .......................................................................................... 18 14 Toggle Burst Length Operation ...................................................................................... 19 APM QSPI PSRAM Datasheet.pdf - Rev. 2.7 Apr 30, 2020 2 of 32 AP Memory reserves the right to change products and/or specifications without notice 2020 AP Memory. All rights reserved