CY14B108L CY14B108N 8-Mbit (1024 K 8/512 K 16) nvSRAM 8-Mbit (1024 K 8/512 K 16) nvSRAM Packages Features 44-/54-pin thin small outline package (TSOP) Type II 20 ns, 25 ns, and 45 ns access times 48-ball fine-pitch ball grid array (FBGA) Internally organized as 1024 K 8 (CY14B108L) or 512 K 16 Pb-free and restriction of hazardous substances (RoHS) (CY14B108N) compliant Hands off automatic STORE on power-down with only a small Functional Description capacitor The Cypress CY14B108L/CY14B108N is a fast static RAM STORE to QuantumTrap nonvolatile elements initiated by (SRAM), with a nonvolatile element in each memory cell. The software, device pin, or AutoStore on power-down memory is organized as 1024 Kbytes of 8 bits each or 512 K RECALL to SRAM initiated by software or power-up words of 16 bits each. The embedded nonvolatile elements incorporate QuantumTrap technology, producing the worlds Infinite Read, Write, and RECALL cycles most reliable nonvolatile memory. The SRAM provides infinite 1 million STORE cycles to QuantumTrap read and write cycles, while independent nonvolatile data resides in the highly reliable QuantumTrap cell. Data transfers 20 year data retention from the SRAM to the nonvolatile elements (the STORE operation) takes place automatically at power-down. On Single 3 V +20, 10 operation power-up, data is restored to the SRAM (the RECALL operation) Industrial temperature from the nonvolatile memory. Both the STORE and RECALL operations are also available under software control. For a complete list of related documentation, click here. 1, 2, 3 Logic Block Diagram V V CC CAP Quatrum Trap 2048 X 2048 X 2 A POWER 0 R A CONTROL O STORE 1 A W 2 RECALL A 3 STORE/RECALL A D 4 HSB CONTROL E STATIC RAM A 5 C ARRAY A 6 O 2048 X 2048 X 2 A 7 SOFTWARE D A A - A 8 14 2 DETECT E A 17 R A 18 A 19 DQ 0 DQ 1 DQ 2 DQ 3 I DQ 4 N DQ 5 P U DQ 6 T DQ 7 B COLUMN I/O U DQ 8 F DQ F 9 E OE DQ 10 COLUMN DEC R WE DQ 11 S DQ 12 DQ 13 CE DQ 14 BLE A A A A A A A A 9 10 11 12 13 14 15 16 DQ 15 BHE Errata: AutoStore Disable feature does not work in the device. For more information, see Errata on page 24. Details include errata trigger conditions, scope of impact, available workarounds, and silicon revision applicability. Notes 1. Address A A for 8 configuration and Address A A for 16 configuration. 0 19 0 18 2. Data DQ DQ for 8 configuration and Data DQ DQ for 16 configuration. 0 7 0 15 3. BHE and BLE are applicable for 16 configuration only. Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-45523 Rev. *P Revised April 21, 2017CY14B108L CY14B108N Contents Pinouts ..............................................................................3 Software Controlled STORE/RECALL Cycle ................ 16 Pin Definitions ..................................................................4 Switching Waveforms .................................................... 16 Device Operation ..............................................................5 Hardware STORE Cycle ................................................. 17 SRAM Read ................................................................5 Switching Waveforms .................................................... 17 SRAM Write .................................................................5 Truth Table For SRAM Operations ................................ 18 AutoStore Operation ....................................................5 Ordering Information ...................................................... 19 Hardware STORE Operation .......................................5 Ordering Code Definitions ......................................... 19 Hardware RECALL (Power-Up) ..................................6 Package Diagrams .......................................................... 20 Software STORE .........................................................6 Acronyms ........................................................................23 Software RECALL .......................................................6 Document Conventions ................................................. 23 Preventing AutoStore ..................................................8 Units of Measure ....................................................... 23 Data Protection ............................................................8 Errata ...............................................................................24 Maximum Ratings .............................................................9 Part Numbers Affected .............................................. 24 Operating Range ...............................................................9 8Mb (1024 K 8, 512 K 16) nvSRAM DC Electrical Characteristics ..........................................9 Qualification Status ........................................................... 24 Data Retention and Endurance .....................................10 8Mb (1024 K 8, 512 K 16) nvSRAM Capacitance ....................................................................10 Errata Summary ............................................................... 24 Thermal Resistance ........................................................10 Document History Page ................................................. 25 AC Test Loads ................................................................11 Sales, Solutions, and Legal Information ...................... 27 AC Test Conditions ........................................................11 Worldwide Sales and Design Support ....................... 27 AC Switching Characteristics .......................................12 Products ....................................................................27 Switching Waveforms ....................................................12 PSoC Solutions ...................................................... 27 AutoStore/Power-Up RECALL .......................................15 Cypress Developer Community ................................. 27 Switching Waveforms ....................................................15 Technical Support ..................................................... 27 Document Number: 001-45523 Rev. *P Page 2 of 27