CY14B256LA-SP25XIT Infineon

Please note that Cypress is an Infineon Technologies Company. The document following this cover page is marked as Cypress document as this is the company that originally developed the product. Please note that Infineon will continue to offer the product to new and existing customers as part of the Infineon product portfolio. Continuity of document content The fact that Infineon offers the following product as part of the Infineon product portfolio does not lead to any changes to this document. Future revisions will occur when appropriate, and any changes will be set out on the document history page. Continuity of ordering part numbers Infineon continues to support existing part numbers. Please continue to use the ordering part numbers listed in the datasheet for ordering. www.infineon.com CY14B256LA 256-Kbit (32 K 8) nvSRAM CY14B256LA, 256-Kbit (32 K 8) nvSRAM Features Functional Description 25 ns and 45 ns access times The Cypress CY14B256LA is a fast static RAM, with a nonvolatile element in each memory cell. The memory is Internally organized as 32 K 8 (CY14B256LA) organized as 32 K bytes of 8 bits each. The embedded Hands off automatic STORE on power-down with only a small nonvolatile elements incorporate QuantumTrap technology, capacitor producing the worlds most reliable nonvolatile memory. The SRAM provides infinite read and write cycles, while independent STORE to QuantumTrap nonvolatile elements initiated by nonvolatile data resides in the highly reliable QuantumTrap cell. software, device pin, or AutoStore on power-down Data transfers from the SRAM to the nonvolatile elements (the RECALL to SRAM initiated by software or power-up STORE operation) takes place automatically at power-down. On power-up, data is restored to the SRAM (the RECALL operation) Infinite read, write, and recall cycles from the nonvolatile memory. Both the STORE and RECALL 1 million STORE cycles to QuantumTrap operations are also available under software control. For a complete list of related documentation, click here. 20-year data retention Single 3 V +20% to 10% operation Industrial temperature 44-pin thin small outline package (TSOP) Type II, 48-pin shrunk small outline package (SSOP), and 32-pin small-outline integrated circuit (SOIC) packages Pb-free and restriction of hazardous substances (RoHS) compliance Logic Block Diagram Logic Block Diagram V V CC CAP Quantum Trap 512 X 512 POWER A 5 STORE CONTROL A 6 A 7 RECALL A 8 STORE/ STATIC RAM A RECALL HSB 9 ARRAY CONTROL A 11 512 X 512 A 12 A 13 A 14 SOFTWARE A - A DETECT 13 0 COLUMN I/O DQ 0 DQ 1 COLUMN DEC DQ 2 DQ 3 DQ 4 DQ A A A A A A 0 1 4 5 2 3 10 DQ 6 DQ 7 OE CE WE Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-54707 Rev. *L Revised April 25, 2020 INPUT BUFFERS ROW DECODER