CY14MB064Q1B/CY14MB064Q2B CY14ME064Q1B/CY14ME064Q2B 64-Kbit (8K 8) SPI nvSRAM 64-Kbit (8K 8) SPI nvSRAM Industry standard configurations Features Operating voltages: 64-Kbit nonvolatile static random access memory (nvSRAM) CY14MB064Q1B/CY14MB064Q2B: V = 2.7 V to 3.6 V CC internally organized as 8K 8 CY14ME064Q1B/CY14ME064Q2B: V = 4.5 V to 5.5 V CC STORE to QuantumTrap nonvolatile elements initiated Industrial temperature automatically on power-down (AutoStore) or by using SPI 8-pin small outline integrated circuit (SOIC) package instruction (Software STORE) Restriction of hazardous substances (RoHS) compliant RECALL to SRAM initiated on power-up (Power-Up RECALL) or by SPI instruction (Software RECALL) Functional Description Support automatic STORE on power-down with a small capacitor (except for CY14MX064Q1B) The Cypress CY14MX064Q combines a 64-Kbit nvSRAM with a nonvolatile element in each memory cell with serial SPI interface. High reliability The memory is organized as 8K words of 8 bits each. The Infinite read, write, and RECALL cycles embedded nonvolatile elements incorporate the QuantumTrap 1million STORE cycles to QuantumTrap technology, creating the worlds most reliable nonvolatile memory. The SRAM provides infinite read and write cycles, while Data retention: 20 years at 85 C the QuantumTrap cells provide highly reliable nonvolatile High speed serial peripheral interface (SPI) storage of data. Data transfers from SRAM to the nonvolatile 40-MHz clock rate SPI write and read with zero cycle delay elements (STORE operation) takes place automatically at Supports SPI mode 0 (0, 0) and mode 3 (1, 1) power-down (except for CY14MX064Q1B). On power-up, data is restored to the SRAM from the nonvolatile memory (RECALL SPI access to special functions operation). You can also initiate the STORE and RECALL Nonvolatile STORE/RECALL operations through SPI instruction. 8-byte serial number For a complete list of related documentation, click here. Manufacturer ID and Product ID Sleep mode Configuration Write protection Feature CY14MX064Q1B CY14MX064Q2B Hardware protection using Write Protect (WP) pin Software protection using Write Disable instruction AutoStore No Yes Software block protection for 1/4, 1/2, or entire array Software STORE Yes Yes Low power consumption Average active current of 3 mA at 40 MHz operation Average standby mode current of 120 A Sleep mode current of 8 A Logic Block Diagram Serial Number 8 x 8 Manufacturer ID / Status Register Product ID QuantumTrap 8 K x 8 WRSR/RDSR/WREN STORE SRAM RDSN/WRSN/RDID SI 8 K x 8 Memory RECALL READ/WRITE CS SPI Control Logic Data & Address Write Protection STORE/RECALL/ASENB/ASDISB Control SCK Instruction decoder WP SO V CC SLEEP Power Control Block V CAP Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-70382 Rev. *K Revised August 8, 2018CY14MB064Q1B/CY14MB064Q2B CY14ME064Q1B/CY14ME064Q2B Contents Pinout ................................................................................3 AutoStore Disable (ASDISB) Instruction ................... 15 Pin Definitions ..................................................................3 Special Instructions ....................................................... 15 Device Operation ..............................................................4 SLEEP Instruction ..................................................... 15 SRAM Write .................................................................4 Serial Number ................................................................. 15 SRAM Read ................................................................4 WRSN (Serial Number Write) Instruction .................. 15 STORE Operation .......................................................4 RDSN (Serial Number Read) Instruction ................... 16 AutoStore Operation ....................................................4 Device ID ......................................................................... 16 Software STORE Operation ........................................5 RDID (Device ID Read) Instruction ........................... 17 RECALL Operation ......................................................5 HOLD Pin Operation ................................................. 17 Hardware RECALL (Power-Up) ..................................5 Maximum Ratings ........................................................... 18 Software RECALL .......................................................5 Operating Range ............................................................. 18 Disabling and Enabling AutoStore ...............................5 DC Electrical Characteristics ........................................ 18 Serial Peripheral Interface ...............................................6 Data Retention and Endurance ..................................... 20 SPI Overview ...............................................................6 Capacitance .................................................................... 20 SPI Modes ...................................................................7 Thermal Resistance ........................................................ 20 SPI Operating Features ....................................................8 AC Test Loads and Waveforms ..................................... 20 Power-Up ....................................................................8 AC Test Conditions ........................................................ 20 Power-Down ................................................................8 AC Switching Characteristics ....................................... 21 Active Power and Standby Power Modes ...................8 Switching Waveforms .................................................... 22 SPI Functional Description ..............................................9 AutoStore or Power-Up RECALL ..................................23 Status Register ...............................................................10 Software Controlled STORE and RECALL Cycles ...... 24 Read Status Register (RDSR) Instruction .................10 Switching Waveforms .................................................... 24 Write Status Register (WRSR) Instruction ................10 Ordering Information ...................................................... 25 Write Protection and Block Protection .........................11 Ordering Code Definitions ......................................... 25 Write Enable (WREN) Instruction ..............................11 Package Diagrams .......................................................... 26 Write Disable (WRDI) Instruction ..............................11 Acronyms ........................................................................ 27 Block Protection ........................................................12 Document Conventions ................................................. 27 Hardware Write Protection (WP) ...............................12 Units of Measure ....................................................... 27 Memory Access ..............................................................12 Document History Page ................................................. 28 Read Sequence (READ) Instruction ..........................12 Sales, Solutions, and Legal Information ...................... 29 Write Sequence (WRITE) Instruction ........................12 Worldwide Sales and Design Support ....................... 29 nvSRAM Special Instructions ........................................14 Products .................................................................... 29 Software STORE (STORE) Instruction .....................14 PSoC Solutions ...................................................... 29 Software RECALL (RECALL) Instruction ..................14 Cypress Developer Community ................................. 29 AutoStore Enable (ASENB) Instruction .....................14 Technical Support ..................................................... 29 Document Number: 001-70382 Rev. *K Page 2 of 29