CY14MC256J CY14MB256J CY14ME256J 2 256-Kbit (32 K 8) Serial (I C) nvSRAM 256-Kbit (32 K 8) Serial (I2C) nvSRAM Industry standard configurations Features Operating voltages: 256-Kbit nonvolatile static random access memory (nvSRAM) CY14MC256J: V = 2.4 V to 2.6 V CC Internally organized as 32 K 8 CY14MB256J: V = 2.7 V to 3.6 V CC STORE to QuantumTrap nonvolatile elements initiated CY14ME256J: V = 4.5 V to 5.5 V CC 2 automatically on power-down (AutoStore) or by using I C Industrial temperature command (Software STORE) or HSB pin (Hardware STORE) 8- and 16-pin small outline integrated circuit (SOIC) package RECALL to SRAM initiated on power-up (Power-Up Restriction of hazardous substances (RoHS) compliant 2 RECALL) or by I C command (Software RECALL) Overview Automatic STORE on power-down with a small capacitor (except for CY14MX256J1) The Cypress CY14MC256J/CY14MB256J/CY14ME256J 2 High reliability combines a 256-Kbit nvSRAM with a nonvolatile element in each memory cell. The memory is organized as 32 K words of Infinite read, write, and RECALL cycles 8 bits each. The embedded nonvolatile elements incorporate the 1 million STORE cycles to QuantumTrap QuantumTrap technology, creating the worlds most reliable Data retention: 20 years at 85 C nonvolatile memory. The SRAM provides infinite read and write 2 1 High speed I C interface cycles, while the QuantumTrap cells provide highly reliable nonvolatile storage of data. Data transfers from SRAM to the Industry standard 100 kHz and 400 kHz speed nonvolatile elements (STORE operation) takes place Fast-mode Plus: 1 MHz speed automatically at power-down (except for CY14MX256J1). On High speed: 3.4 MHz power-up, data is restored to the SRAM from the nonvolatile Zero cycle delay reads and writes memory (RECALL operation). The STORE and RECALL 2 Write protection operations can also be initiated by the user through I C commands. Hardware protection using Write Protect (WP) pin Software block protection for one quarter, half, or entire array For a complete list of related documentation, click here. 2 I C access to special functions Configuration Nonvolatile STORE/RECALL Feature CY14MX256J1 CY14MX256J2 CY14MX256J3 8 byte serial number Manufacturer ID and Product ID AutoStore No Yes Yes Sleep mode Software Yes Yes Yes STORE Low power consumption Average active current of 1 mA at 3.4-MHz operation Hardware No No Yes STORE Average standby mode current of 150 A Sleep mode current of 8 A Slave Address A2, A1, A0 A2, A1 A2, A1, A0 pins Logic Block Diagram Serial Number 8 x 8 V V CC CAP Manufacturer ID / Product ID Power Control Memory Control Register Block QuantumTrap Command Register 32 K x 8 Sleep STORE SRAM Control Registers Slave SDA 2 32 K x 8 I C Control Logic Memory RECALL SCL Memory Slave Slave Address Address and Data A2, A1, A0 Decoder Control WP Notes 2 1. The I C nvSRAM is a single solution which is usable for all four speed modes of operation. As a result, some I/O parameters are slightly different than those on chips which support only one mode of operation. Refer to AN87209 for more details. 2 2. Serial (I C) nvSRAM is referred to as nvSRAM throughout the datasheet. Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-65233 Rev. *I Revised November 26, 2014CY14MC256J CY14MB256J CY14ME256J Contents Pinouts ..............................................................................3 Operating Range ............................................................. 18 Pin Definitions ..................................................................3 DC Electrical Characteristics ........................................ 18 I2C Interface ......................................................................4 Data Retention and Endurance ..................................... 19 Protocol Overview ............................................................4 Thermal Resistance ........................................................ 19 I2C Protocol Data Transfer .......................................4 AC Test Loads and Waveforms ..................................... 20 Data Validity ................................................................5 AC Test Conditions ........................................................ 20 START Condition (S) ...................................................5 AC Switching Characteristics ....................................... 21 STOP Condition (P) .....................................................5 Switching Waveforms .................................................... 21 Repeated START (Sr) .................................................5 nvSRAM Specifications ................................................. 22 Byte Format .................................................................5 Switching Waveforms .................................................... 22 Acknowledge / No-acknowledge .................................5 Software Controlled STORE/RECALL Cycles .............. 23 High Speed Mode (Hs-mode) ......................................6 Switching Waveforms .................................................... 23 Slave Device Address .................................................7 Hardware STORE Cycle ................................................. 24 Write Protection (WP) ..................................................9 Switching Waveforms .................................................... 24 AutoStore Operation ....................................................9 Ordering Information ...................................................... 25 Hardware STORE and HSB pin Operation .................9 Ordering Code Definitions ......................................... 25 Hardware RECALL (Power-Up) ..................................9 Package Diagrams .......................................................... 26 Write Operation .........................................................10 Acronyms ........................................................................28 Read Operation .........................................................10 Document Conventions ................................................. 28 Memory Slave Access ...............................................10 Units of Measure ....................................................... 28 Control Registers Slave .............................................14 Document History Page ................................................. 29 Serial Number .................................................................16 Sales, Solutions, and Legal Information ...................... 30 Serial Number Write ..................................................16 Worldwide Sales and Design Support ....................... 30 Serial Number Lock ...................................................16 Products ....................................................................30 Serial Number Read ..................................................16 PSoC Solutions ...................................................... 30 Device ID .........................................................................17 Cypress Developer Community ................................. 30 Executing Commands Using Command Register .....17 Technical Support ..................................................... 30 Maximum Ratings ...........................................................18 Document Number: 001-65233 Rev. *I Page 2 of 30