CY14MB064Q CY14ME064Q 64-Kbit (8K 8) SPI nvSRAM 64-Kbit (8K 8) SPI nvSRAM Industry standard configurations Features Operating voltages: 64-Kbit nonvolatile static random access memory (nvSRAM) CY14MB064Q: V = 2.7 V to 3.6 V CC internally organized as 8K 8 CY14ME064Q: V = 4.5 V to 5.5 V CC STORE to QuantumTrap nonvolatile elements initiated Industrial temperature automatically on power-down (AutoStore) or by using SPI 8- and 16-pin small outline integrated circuit (SOIC) package instruction (Software STORE) or HSB pin (Hardware Restriction of hazardous substances (RoHS) compliant STORE) Functional Description RECALL to SRAM initiated on power-up (Power-Up RECALL) or by SPI instruction (Software RECALL) The Cypress CY14MX064Q combines a 64 Kbit nvSRAM with a Support automatic STORE on power-down with a small nonvolatile element in each memory cell with serial SPI interface. capacitor (except for CY14MX064Q1A) The memory is organized as 8K words of 8 bits each. The High reliability embedded nonvolatile elements incorporate the QuantumTrap Infinite read, write, and RECALL cycles technology, creating the worlds most reliable nonvolatile memory. The SRAM provides infinite read and write cycles, while 1million STORE cycles to QuantumTrap the QuantumTrap cells provide highly reliable nonvolatile Data retention: 20 years at 85 C storage of data. Data transfers from SRAM to the nonvolatile High speed serial peripheral interface (SPI) elements (STORE operation) takes place automatically at 40-MHz clock rate SPI write and read with zero cycle delay power-down (except for CY14MX064Q1A). On power-up, data Supports SPI mode 0 (0,0) and mode 3 (1,1) is restored to the SRAM from the nonvolatile memory (RECALL operation). You can also initiate the STORE and RECALL SPI access to special functions operations through SPI instruction. Nonvolatile STORE/RECALL For a complete list of related documentation, click here. 8-byte serial number Manufacturer ID and Product ID Configuration Sleep mode Feature CY14MX064Q1A CY14MX064Q2A CY14MX064Q3A Write protection Hardware protection using Write Protect (WP) pin AutoStore No Yes Yes Software protection using Write Disable instruction Software Yes Yes Yes Software block protection for 1/4, 1/2, or entire array STORE Hardware No No Yes Low power consumption STORE Average active current of 3 mA at 40 MHz operation Average standby mode current of 150 A Sleep mode current of 8 A Logic Block Diagram V V CC CAP Serial Number 8 x 8 Power Control Manufacturer ID / Block Product ID QuantumTrap 8 K x 8 SLEEP STORE SRAM RDSN/WRSN/RDID SI Memory 8 K x 8 RECALL Data & READ/WRITE CS SPI Control Logic Address STORE/RECALL/ASENB/ASDISB SCK Write Protection Control Instruction decoder WP SO WRSR/RDSR/WREN Status Register Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-65018 Rev. *H Revised February 16, 2016CY14MB064Q CY14ME064Q Contents Pinouts ..............................................................................3 Special Instructions ....................................................... 15 Pin Definitions ..................................................................3 SLEEP Instruction ..................................................... 15 Device Operation ..............................................................4 Serial Number ................................................................. 15 SRAM Write .................................................................4 WRSN (Serial Number Write) Instruction .................. 15 SRAM Read ................................................................4 RDSN (Serial Number Read) Instruction ................... 16 STORE Operation .......................................................4 Device ID ......................................................................... 16 AutoStore Operation ....................................................4 RDID (Device ID Read) Instruction ...........................16 Software STORE Operation ........................................5 HOLD Pin Operation ................................................. 17 Hardware STORE and HSB pin Operation .................5 Maximum Ratings ........................................................... 18 RECALL Operation ......................................................5 Operating Range ............................................................. 18 Hardware RECALL (Power-Up) ..................................5 DC Electrical Characteristics ........................................ 18 Software RECALL .......................................................5 Data Retention and Endurance ..................................... 19 Disabling and Enabling AutoStore ...............................6 Capacitance ....................................................................19 Serial Peripheral Interface ...............................................6 Thermal Resistance ........................................................ 19 SPI Overview ...............................................................6 AC Test Loads and Waveforms ..................................... 20 SPI Modes ...................................................................7 AC Test Conditions ........................................................ 20 SPI Operating Features ....................................................8 AC Switching Characteristics ....................................... 21 Power-Up ....................................................................8 Switching Waveforms .................................................... 22 Power-Down ................................................................8 AutoStore or Power-Up RECALL .................................. 23 Active Power and Standby Power Modes ...................8 Switching Waveforms .................................................... 24 SPI Functional Description ..............................................9 Software Controlled STORE and RECALL Cycles ...... 25 Status Register ...............................................................10 Switching Waveforms .................................................... 25 Read Status Register (RDSR) Instruction .................10 Hardware STORE Cycle ................................................. 26 Write Status Register (WRSR) Instruction ................10 Switching Waveforms .................................................... 26 Write Protection and Block Protection .........................11 Ordering Information ...................................................... 27 Write Enable (WREN) Instruction ..............................11 Ordering Code Definitions ......................................... 27 Write Disable (WRDI) Instruction ..............................11 Package Diagrams .......................................................... 28 Block Protection ........................................................12 Acronyms ........................................................................30 Hardware Write Protection (WP) ...............................12 Document Conventions ................................................. 30 Memory Access ..............................................................12 Units of Measure ....................................................... 30 Read Sequence (READ) Instruction ..........................12 Document History Page ................................................. 31 Write Sequence (WRITE) Instruction ........................12 Sales, Solutions, and Legal Information ...................... 32 nvSRAM Special Instructions ........................................14 Worldwide Sales and Design Support ....................... 32 Software STORE (STORE) Instruction .....................14 Products ....................................................................32 Software RECALL (RECALL) Instruction ..................14 PSoC Solutions ...................................................... 32 AutoStore Enable (ASENB) Instruction .....................14 Cypress Developer Community ................................. 32 AutoStore Disable (ASDISB) Instruction ...................15 Technical Support ..................................................... 32 Document Number: 001-65018 Rev. *H Page 2 of 32