Please note that Cypress is an Infineon Technologies Company. The document following this cover page is marked as Cypress document as this is the company that originally developed the product. Please note that Infineon will continue to offer the product to new and existing customers as part of the Infineon product portfolio. Continuity of document content The fact that Infineon offers the following product as part of the Infineon product portfolio does not lead to any changes to this document. Future revisions will occur when appropriate, and any changes will be set out on the document history page. Continuity of ordering part numbers Infineon continues to support existing part numbers. Please continue to use the ordering part numbers listed in the datasheet for ordering. www.infineon.comCY14V116N 16-Mbit (1024K 16) nvSRAM CY14V116N, 16-Mbit (1024K 16) nvSRAM Industrial temperature: 40 C to +85 C Features 165-ball fine-pitch ball grid array (FBGA) package 16-Mbit nonvolatile static random access memory (nvSRAM) Restriction of hazardous substances (RoHS) compliant 30-ns and 45-ns access times Logically organized as 1024K 16 Functional Description Hands-off automatic STORE on power-down with only a small capacitor The Cypress CY14V116N is a fast SRAM, with a nonvolatile STORE to QuantumTrap nonvolatile elements is initiated by element in each memory cell. The memory is organized as software, device pin, or AutoStore on power-down 1024K words of 16 bits each. The embedded nonvolatile RECALL to SRAM initiated by software or power-up elements incorporate QuantumTrap technology, producing the High reliability worlds most reliable nonvolatile memory. The SRAM can be Infinite read, write, and RECALL cycles read and written an infinite number of times. The nonvolatile data 1 million STORE cycles to QuantumTrap residing in the nonvolatile elements do not change when data is Data retention: 20 years written to the SRAM. Data transfers from the SRAM to the Sleep mode operation nonvolatile elements (the STORE operation) takes place Low power consumption automatically at power-down. On power-up, data is restored to Active current of 75 mA at 45 ns the SRAM (the RECALL operation) from the nonvolatile memory. Standby mode current of 650 A Both the STORE and RECALL operations are also available Sleep mode current of 10 A under software control. Operating voltage For a complete list of related documentation, click here. Core V = 2.7 V to 3.6 V I/O V = 1.65 V to 1.95 V CC CCQ V V V CAP CC CCQ Logic Block Diagram POWER CONTROL SLEEP MODE ZZ CONTROL QUANTUMTRAP 4096 X 4096 STORE / RECALL HSB STORE CONTROL RECALL STATIC RAM SOFTWARE A - A 11 ARRAY 0 A - A 2 14 DETECT 4096 X 4096 OE CE 1 WE BLE BHE ZZ COLUMN IO DQ - DQ 0 15 COLUMN DECODER A - A 12 19 Note 1. In this datasheet, CE refers to the internal logical combination of CE and CE , such that when CE is LOW and CE is HIGH, CE is LOW. For all other cases CE is HIGH. 1 2 1 2 Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-75791 Rev. *J Revised September 24, 2019 INPUT BUFFERS ROW DECODER SENSE AMPS OUTPUT BUFFERS CONTROL LOGIC