CY14V256LA 256-Kbit (32K 8) nvSRAM 256-Kbit (32K 8) nvSRAM Features Functional Description 35 ns access time The Cypress CY14V256LA is a fast static RAM, with a nonvolatile element in each memory cell. The memory is Internally organized as 32K 8 organized as 32K bytes of 8 bits each. The embedded Hands off automatic STORE on power down with only a small nonvolatile elements incorporate QuantumTrap technology, capacitor producing the worlds most reliable nonvolatile memory. The SRAM provides infinite read and write cycles, while independent STORE to QuantumTrap nonvolatile elements initiated by nonvolatile data resides in the highly reliable QuantumTrap cell. software, device pin, or AutoStore on power down Data transfers from the SRAM to the nonvolatile elements (the RECALL to SRAM initiated by software or power up STORE operation) takes place automatically at power down. On power-up, data is restored to the SRAM (the RECALL operation) Infinite read, write, and recall cycles from the nonvolatile memory. Both the STORE and RECALL 1 million STORE cycles to QuantumTrap operations are also available under software control. For a complete list of related documentation, click here. 20 year data retention Core V = 3.0 V to 3.6 V I/O V = 1.65 V to 1.95 V CC CCQ Industrial temperature 48-ball fine-pitch ball grid array (FBGA) package Pb-free and restriction of hazardous substances (RoHS) compliance Logic Block Diagram Logic Block Diagram V V V CC CCQ CAP Quantum Trap 512 X 512 POWER A 5 STORE CONTROL A 6 A 7 RECALL A 8 STORE/ STATIC RAM A RECALL HSB 9 ARRAY CONTROL A 11 512 X 512 A 12 A 13 A 14 SOFTWARE A - A 14 DETECT 2 DQ COLUMN I/O 0 DQ 1 COLUMN DEC DQ 2 DQ 3 DQ 4 DQ A A A A A A 0 1 4 5 2 3 10 DQ 6 DQ 7 OE CE WE Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-76295 Rev. *E Revised February 9, 2018 INPUT BUFFERS ROW DECODERCY14V256LA Contents Pinout ................................................................................3 Switching Waveforms .................................................... 11 Pin Definitions ..................................................................3 AutoStore/Power-up RECALL ....................................... 13 Device Operation ..............................................................4 Switching Waveforms .................................................... 14 SRAM Read ................................................................4 Software Controlled STORE/RECALL Cycle ................ 15 SRAM Write .................................................................4 Switching Waveforms .................................................... 15 AutoStore Operation ....................................................4 Hardware STORE Cycle ................................................. 16 Hardware STORE Operation .......................................4 Switching Waveforms .................................................... 16 Hardware RECALL (Power-Up) ..................................5 Truth Table For SRAM Operations ................................17 Software STORE .........................................................5 Ordering Information ...................................................... 18 Software RECALL .......................................................5 Ordering Code Definitions ......................................... 18 Preventing AutoStore ..................................................6 Package Diagrams .......................................................... 19 Data Protection ............................................................6 Acronyms ........................................................................ 20 Maximum Ratings .............................................................7 Document Conventions ................................................. 20 Operating Range ...............................................................7 Units of Measure ....................................................... 20 DC Electrical Characteristics ..........................................7 Document History Page ................................................. 21 Data Retention and Endurance .......................................9 Sales, Solutions, and Legal Information ...................... 22 Capacitance ......................................................................9 Worldwide Sales and Design Support ....................... 22 Thermal Resistance ..........................................................9 Products .................................................................... 22 AC Test Loads ..................................................................9 PSoC Solutions ...................................................... 22 AC Test Conditions ..........................................................9 Cypress Developer Community ................................. 22 AC Switching Characteristics .......................................10 Technical Support ..................................................... 22 SRAM Read Cycle ....................................................10 SRAM Write Cycle .....................................................10 Document Number: 001-76295 Rev. *E Page 2 of 22