STK22C48-SF45I Infineon

STK22C48 16-Kbit (2 K 8) AutoStore nvSRAM 16 Features Functional Description 25 ns and 45 ns access times The Cypress STK22C48 is a fast static RAM with a nonvolatile element in each memory cell. The embedded nonvolatile Hands off automatic STORE on power-down with external elements incorporate QuantumTrap technology producing the 68 F capacitor worlds most reliable nonvolatile memory. The SRAM provides unlimited read and write cycles, while independent nonvolatile STORE to QuantumTrap nonvolatile elements is initiated by data resides in the highly reliable QuantumTrap cell. Data software, hardware, or AutoStore on power-down transfers from the SRAM to the nonvolatile elements (the RECALL to SRAM initiated by software or power-up STORE operation) takes place automatically at power-down. On power-up, data is restored to the SRAM (the RECALL operation) Unlimited read, write, and RECALL cycles from the nonvolatile memory. A hardware STORE is initiated with 1,000,000 STORE cycles to QuantumTrap the HSB pin. For a complete list of related documentation, click here. 100 year data retention to QuantumTrap Single 5 V +10% operation Commercial and industrial temperatures 28-pin 300 mil and (330 mil) Small outline integrated circuit (SOIC) package Restriction of hazardous substances (RoHS) compliant Logic Block Diagram V V CC CAP Quantum Trap 32 X 512 POWER A 5 STORE CONTROL A 6 RECALL STORE/ STATIC RAM A 7 RECALL HSB ARRAY CONTROL A 8 32 X 512 A 9 DQ COLUMN I/O 0 DQ 1 COLUMN DEC DQ 2 DQ 3 DQ 4 DQ A A A A A A 0 1 4 5 2 3 10 DQ 6 DQ 7 OE CE WE Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-51000 Rev. *F Revised November 24, 2014 INPUT BUFFERS ROW DECODER STK22C48 Contents Pin Configurations ........................................................... 3 AC Test Conditions .......................................................... 8 Device Operation ..............................................................4 AC Switching Characteristics ......................................... 9 SRAM Read ....................................................................... 4 SRAM Read Cycle ...................................................... 9 SRAM Write ....................................................................... 4 Switching Waveforms ...................................................... 9 AutoStore Operation ........................................................ 4 SRAM Write Cycle ..................................................... 10 AutoStore Inhibit mode ....................................................4 AutoStore or Power Up RECALL .................................. 11 Hardware STORE (HSB) Operation .................................5 Switching Waveform ...................................................... 11 Hardware RECALL (Power Up) ........................................5 Hardware STORE Cycle ................................................. 12 Data Protection .................................................................5 Switching Waveform ...................................................... 12 Noise Considerations....................................................... 5 Ordering Information ...................................................... 13 Hardware Protect.............................................................. 5 Ordering Code Definitions ......................................... 13 Low Average Active Power.............................................. 5 Package Diagrams .......................................................... 14 Preventing Store............................................................... 6 Document Conventions ................................................. 15 Best Practices................................................................... 6 Acronyms ................................................................. 15 Maximum Ratings .............................................................7 Units of Measure ....................................................... 15 Operating Range ...............................................................7 Document History Page................................................. 16 DC Electrical Characteristics ..........................................7 Sales, Solutions, and Legal Information ...................... 17 Data Retention and Endurance .......................................7 Worldwide Sales and Design Support ....................... 17 Capacitance ...................................................................... 8 Products ....................................................................17 Thermal Resistance ..........................................................8 PSoC Solutions ......................................................... 17 Document Number: 001-51000 Rev. *F Page 2 of 17