PSMN2R0-30YLD N-channel 30 V, 2.0 m logic level MOSFET in LFPAK56 using NextPowerS3 Technology 25 October 2018 Product data sheet 1. General description Logic level gate drive N-channel enhancement mode MOSFET in LFPAK56 package. NextPowerS3 portfolio utilising NXPs unique SchottkyPlus technology delivers high efficiency, low spiking performance usually associated with MOSFETs with an integrated Schottky or Schottky-like diode but without problematic high leakage current. NextPowerS3 is particularly suited to high efficiency applications at high switching frequencies. 2. Features and benefits Ultra low Q , Q and Q for high system efficiency, especially at higher switching G GD OSS frequencies Superfast switching with soft-recovery s-factor > 1 Low spiking and ringing for low EMI designs Unique SchottkyPlus technology Schottky-like performance with < 1 A leakage at 25 C Optimised for 4.5 V gate drive Low parasitic inductance and resistance High reliability clip bonded and solder die attach Power SO8 package no glue, no wire bonds, qualified to 175 C Wave solderable exposed leads for optimal visual solder inspection 3. Applications On-board DC-to-DC solutions for server and telecommunications Secondary-side synchronous rectification in telecommunication applications Voltage regulator modules (VRM) Point-of-Load (POL) modules Power delivery for V-core, ASIC, DDR, GPU, VGA and system components Brushed and brushless motor control 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit V drain-source voltage 25 C T 175 C - - 30 V DS j I drain current V = 10 V T = 25 C Fig. 2 1 - - 100 A D GS mb P total power dissipation T = 25 C Fig. 1 - - 142 W tot mb T junction temperature -55 - 175 C j Static characteristics R drain-source on-state V = 4.5 V I = 25 A T = 25 C - 2.1 2.5 m DSon GS D j resistance Fig. 10 V = 10 V I = 25 A T = 25 C - 1.61 2 m GS D j Fig. 10 Dynamic characteristicsNexperia PSMN2R0-30YLD N-channel 30 V, 2.0 m logic level MOSFET in LFPAK56 using NextPowerS3 Technology Symbol Parameter Conditions Min Typ Max Unit Q gate-drain charge I = 25 A V = 15 V V = 4.5 V - 6.3 - nC GD D DS GS Fig. 12 Fig. 13 Q total gate charge - 21.8 - nC G(tot) Source-drain diode S softness factor I = 25 A dI /dt = -100 A/s V = 0 V - 1.02 - S S GS V = 15 V Fig. 16 DS 1 Continuous current is limited by package. 5. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline Graphic symbol 1 S source mb D 2 S source G 3 S source 4 G gate mbb076 S mb D mounting base connected to 1 2 3 4 drain LFPAK56 Power- SO8 (SOT669) 6. Ordering information Table 3. Ordering information Type number Package Name Description Version PSMN2R0-30YLD LFPAK56 Plastic single-ended surface-mounted package (LFPAK56 SOT669 Power-SO8 Power-SO8) 4 leads 7. Marking Table 4. Marking codes Type number Marking code PSMN2R0-30YLD 2D030L 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit V drain-source voltage 25 C T 175 C - 30 V DS j V drain-gate voltage 25 C T 175 C R = 20 k - 30 V DGR j GS V gate-source voltage -20 20 V GS P total power dissipation T = 25 C Fig. 1 - 142 W tot mb I drain current V = 10 V T = 25 C Fig. 2 1 - 100 A D GS mb V = 10 V T = 100 C Fig. 2 1 - 100 A GS mb I peak drain current pulsed t 10 s T = 25 C Fig. 3 - 793 A DM p mb PSMN2R0-30YLD All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2018. All rights reserved Product data sheet 25 October 2018 2 / 13