CAV25010, CAV25020, CAV25040 EEPROM Serial 1/2/4-Kb SPI Automotive Grade 1 Description The CAV25010/20/40 are a EEPROM Serial 1/2/4 Kb SPI www.onsemi.com Automotive Grade 1 devices internally organized as 128x8/256x8/512x8 bits. They feature a 16byte page write buffer and support the Serial Peripheral Interface (SPI) protocol. The device is enabled through a Chip Select (CS) input. In addition, the required bus signals are a clock input (SCK), data input (SI) and data output (SO) SOIC8 TSSOP8 lines. The HOLD input may be used to pause any serial V SUFFIX Y SUFFIX CASE 751BD CASE 948AL communication with the CAV25010/20/40 device. These devices feature software and hardware write protection, including partial as well as full array protection. PIN CONFIGURATION Features 1 CS V CC Automotive AECQ100 Grade 1 (40C to +125C) Qualified SO HOLD 10 MHz SPI Compatible WP SCK 2.5 V to 5.5 V Supply Voltage Range V SI SS SPI Modes (0,0) & (1,1) SOIC (V), TSSOP (Y) 16byte Page Write Buffer Selftimed Write Cycle For the location of Pin 1, please consult the corresponding package drawing. Hardware and Software Protection Block Write Protection Protect 1/4, 1/2 or Entire EEPROM Array PIN FUNCTION Low Power CMOS Technology Pin Name Function 1,000,000 Program/Erase Cycles CS Chip Select 100 Year Data Retention SO Serial Data Output Industrial and Extended Temperature Range WP Write Protect SOIC and TSSOP 8Lead Packages V Ground SS These Devices are PbFree, Halogen Free/BFR Free, and RoHS Compliant SI Serial Data Input SCK Serial Clock V CC HOLD Hold Transmission Input V Power Supply CC SI CS CAV25010 CAV25020 SO ORDERING INFORMATION WP CAV25040 See detailed ordering and shipping information in the package HOLD dimensions section on page 9 of this data sheet. SCK V SS Figure 1. Functional Symbol Semiconductor Components Industries, LLC, 2012 1 Publication Order Number: April, 2019 Rev. 2 CAV25010/DCAV25010, CAV25020, CAV25040 MARKING DIAGRAMS 25010E = CAV25010 S01E = CAV25010 25020E = CAV25020 S02E = CAV25020 25xx0E 25040E = CAV25040 S04E = CAV25040 SxxE AYMXXX A = Assembly Location A = Assembly Location AYMXXX Y = Production Year (Last Digit) Y = Production Year (Last Digit) M = Production Month (19, O, N, D) M = Production Month (19, O, N, D) XXX = Last Three Digits of XXX = Last Three Digits of (TSSOP8) XXX = Assembly Lot Number XXX = Assembly Lot Number (SOIC8) = PbFree Package = PbFree Package Table 1. ABSOLUTE MAXIMUM RATINGS Parameters Ratings Units Operating Temperature 45 to +130 C Storage Temperature 65 to +150 C Voltage on any Pin with Respect to Ground (Note 1) 0.5 to V + 0.5 V CC Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. Table 2. RELIABILITY CHARACTERISTICS (Note 2) Symbol Parameter Min Units N (Note 3) Endurance 1,000,000 Program / Erase Cycles END T Data Retention 100 Years DR Table 3. D.C. OPERATING CHARACTERISTICS (V = 2.5 V to 5.5 V, T = 40C to +125C, unless otherwise specified.) CC A Symbol Parameter Test Conditions Min Max Units I Supply Current (Read Mode) Read, V = 5.5 V, 10 MHz, SO open 2 mA CCR CC I Supply Current (Write Mode) Write, V = 5.5 V, 10 MHz, SO open 2 mA CCW CC I Standby Current V = GND or V , CS = V , 2 A SB1 IN CC CC WP = V , V = 5.5 V CC CC I Standby Current V = GND or V , CS = V , 5 A SB2 IN CC CC WP = GND, V = 5.5 V CC I Input Leakage Current V = GND or V 2 2 A L IN CC I Output Leakage Current CS = V , 1 2 A LO CC V = GND or V OUT CC V Input Low Voltage 0.5 0.3 V V IL CC V Input High Voltage 0.7 V V + 0.5 V IH CC CC V Output Low Voltage I = 3.0 mA 0.4 V OL OL V Output High Voltage I = 1.6 mA V 0.8 V V OH OH CC Table 4. PIN CAPACITANCE (Note 2) (T = 25C, f = 1.0 MHz, V = +5.0 V) A CC Symbol Test Conditions Min Typ Max Units C Output Capacitance (SO) V = 0 V 8 pF OUT OUT C Input Capacitance (CS, SCK, SI, WP, HOLD) V = 0 V 8 pF IN IN 1. The DC input voltage on any pin should not be lower than 0.5 V or higher than V + 0.5 V. During transitions, the voltage on any pin may CC undershoot to no less than 1.5 V or overshoot to no more than V + 1.5 V, for periods of less than 20 ns. CC 2. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AECQ100 and JEDEC test methods. 3. Page Mode, V = 5 V, 25C. CC www.onsemi.com 2