MC14559BDWR2G ON Semiconductor

MC14549B, MC14559B Successive Approximation Registers The MC14549B and MC14559B successive approximation registers are 8bit registers providing all the digital control and storage necessary for successive approximation analogtodigital conversion MC14549B, MC14559B TRUTH TABLES MC14549B MC14559B SC SC( ) MR MR( ) Clock Action SC SC( ) EOC Clock Action t1 t1 t1 X X X X None X X X None X X 1 X Reset 1 0 0 Start Conversion 1 0 0 0 Start Conversion X 1 0 Continue Conversion 1 X 0 1 Start Conversion 0 0 0 Continue Conversion 1 1 0 0 Continue Conversion 0 X 1 Retain Conversion 0 X 0 X Continue Result Previous Operation 1 X 1 Start Conversion X = Dont Care t1 = State at Previous Clock ELECTRICAL CHARACTERISTICS (Voltages Referenced to V ) SS 55 C 25 C 125 C V DD Typ Min Max Min (Note 2) Max Min Max Characteristic Symbol Vdc Unit Output Voltage 0 Level V 5.0 0.05 0 0.05 0.05 Vdc OL V = V or 0 10 0.05 0 0.05 0.05 in DD 15 0.05 0 0.05 0.05 1 Level V 5.0 4.95 4.95 5.0 4.95 Vdc OH V = 0 or V 10 9.95 9.95 10 9.95 in DD 15 14.95 14.95 15 14.95 Input Voltage (Note 2) 0 Level V Vdc IL (V = 4.5 or 0.5 Vdc) 5.0 1.5 2.25 1.5 1.5 O (V = 9.0 or 1.0 Vdc) 10 3.0 4.50 3.0 3.0 O (V = 13.5 or 1.5 Vdc) 15 4.0 6.75 4.0 4.0 O 1 Level V Vdc IH (V = 0.5 or 4.5 Vdc) 5.0 3.5 3.5 2.75 3.5 O (V = 1.0 or 9.0 Vdc) 10 7.0 7.0 5.50 7.0 O (V = 1.5 or 13.5 Vdc) 15 11 11 8.25 11 O Output Drive Current I mAd OH (V = 2.5 Vdc) Source 5.0 1.2 1.0 1.7 0.7 c OH (V = 4.6 Vdc) 5.0 0.25 0.2 0.36 0.14 OH (V = 9.5 Vdc) 10 0.62 0.5 0.9 0.35 OH (V = 13.5 Vdc) 15 1.8 1.5 3.5 1.1 OH (V = 0.4 Vdc) Sink I 5.0 1.28 1.02 1.76 0.72 mAd OL OL (V = 0.5 Vdc) Q Outputs 10 3.2 2.6 4.5 1.8 c OL (V = 1.5 Vdc) 15 8.4 6.8 17.6 4.8 OL (V = 0.4 Vdc) Sink 5.0 0.64 0.51 0.88 0.36 mAd OL (V = 0.5 Vdc) Pin 5, 11 only 10 1.6 1.3 2.25 0.9 c OL (V = 1.5 Vdc) 15 4.2 3.4 8.8 2.4 OL Input Current I 15 0.1 0.00001 0.1 1.0 Adc in Input Capacitance C 5.0 7.5 pF in Quiescent Current I 5.0 5.0 0.005 5.0 150 Adc DD (Per Package) 10 10 0.010 10 300 (Clock = 0 V, 15 20 0.015 20 600 Other Inputs = V or 0 V, I = 0 A) DD out Total Supply Current (Note 3, 4) I 5.0 I = (0.8 A/kHz) f + I Adc T T DD (Dynamic plus Quiescent, 10 I = (1.6 A/kHz) f + I T DD Per Package) (C = 50 pF on all 15 I = (2.4 A/kHz) f + I L T DD outputs, all buffers switching) Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 2. Noise immunity specified for worstcase input combination. Noise Margin for both 1 and 0 level = 1.0 V min V = 5.0 V DD = 2.0 V min V = 10 V DD = 2.5 V min V = 15 V DD 3 3. To calculate total supply current at loads other than 50 pF: I (C ) = I (50 pF) + 3.5 x 10 (C = 50) V f where: I is in A (per package), T L T L DD T C in pF, V in V, and f in kHz is input frequency. L DD 4. The formulas given are for the typical characteristics only at 25 C.