NTD3055L104, NTDV3055L104 MOSFET Power, N-Channel, Logic Level, DPAK/IPAK 12 A, 60 V Designed for low voltage, high speed switching applications in power www.onsemi.com supplies, converters and power motor controls and bridge circuits. Features V R TYP I MAX (BR)DSS DS(on) D Lower R DS(on) 60 V 104 m 12 A Lower V DS(on) Tighter V Specification SD D Lower Diode Reverse Recovery Time Lower Reverse Recovery Stored Charge NTDV and STDV Prefixes for Automotive and Other Applications NChannel Requiring Unique Site and Control Change Requirements G AECQ101 Qualified and PPAP Capable These Devices are PbFree and are RoHS Compliant S Typical Applications 4 Power Supplies Converters 4 Power Motor Controls Bridge Circuits 1 2 1 2 3 3 MAXIMUM RATINGS (T = 25C unless otherwise noted) J DPAK IPAK Rating Symbol Value Unit CASE 369C CASE 369D DraintoSource Voltage V 60 Vdc DSS STYLE 2 STYLE 2 DraintoGate Voltage (R = 10 M ) V 60 Vdc GS DGR MARKING DIAGRAMS GatetoSource Voltage, Continuous V 15 Vdc GS NonRepetitive (t 10 ms) V 20 & PIN ASSIGNMENTS p GS Drain Current 4 4 Continuous T = 25C I 12 Adc Drain Drain A D Continuous T = 100C I 10 A D I 45 Apk Single Pulse (t 10 s) p DM Total Power Dissipation T = 25C P 48 W A D Derate above 25C 0.32 W/C Total Power Dissipation T = 25C (Note 1) 2.1 W A Total Power Dissipation T = 25C (Note 2) 1.5 W A 2 1 3 Operating and Storage Temperature Range T , T 55 to C Drain J stg Gate Source +175 1 2 3 Gate Drain Source Single Pulse DraintoSource Avalanche E 61 mJ AS Energy Starting T = 25C J A = Assembly Location* (V = 25 Vdc, V = 5.0 Vdc, L = 1.0 mH DD GS 55L104 = Device Code I = 11 A, V = 60 Vdc) L(pk) DS Y = Year Thermal Resistance, JunctiontoCase R 3.13 C/W JC WW = Work Week JunctiontoAmbient (Note 1) R 71.4 JA G = PbFree Package JunctiontoAmbient (Note 2) R 100 JA * The Assembly Location code (A) is front side Maximum Lead Temperature for Soldering T 260 C L optional. In cases where the Assembly Location is Purposes, 1/8 from case for 10 seconds stamped in the package, the front side assembly Stresses exceeding those listed in the Maximum Ratings table may damage the code may be blank. device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. When surface mounted to an FR4 board using 1 pad size, ORDERING INFORMATION 2 (Cu Area 1.127 in ). See detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet. Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: May, 2019 Rev. 10 NTD3055L104/D AYWW 55L 104G AYWw 55L 104GNTD3055L104, NTDV3055L104 2. When surface mounted to an FR4 board using the minimum recommended 2 pad size, (Cu Area 0.412 in ). www.onsemi.com 2