Doc No. TT4-EA-14960 Revision. 3 Product Standards MOS FET FJ4B01120L FJ4B01120L Single P-channel MOS FET Unit: mm 1.0 Features 4 3 Drain-source On-state Resistance : RDS(on) typ. = 40 m ( VGS = -2.5 V ) ( Top View ) CSP( Chip Size Package ) 1 2 Halogen-free / RoHS compliant ( EU RoHS / UL-94 V-0 / MSL : Level 1 ) Mark Identifier ( Front View ) 0.25 Marking Symbol : 1F 1 2 ( Bottom View ) Packaging 4 3 Embossed type ( Thermo-compression sealing ) : 20 000 pcs / reel ( standard ) (0.25) 0.5 Absolute Maximum Ratings Ta = 25 C 1. Gate 3. Source Parameter Symbol Rating Unit 2. Drain 4. Source Drain-source Voltage VDS -12 V Gate-source Voltage VGS 8 V Panasonic ULGA004-W-1010-RA01 *1 -2.6 A JEITA ID1 *2 DC -4.2 A Code ID2 *3 -5.4 A ID3 Drain Current IDp1 -20 A Equivalent circuit *4 IDp2 -33 A Pulsed 2(D) IDp3 -43 A *1 PD1 0.37 W *2 Total Power Dissipation 0.94 W PD2 *3 1.5 W PD3 Tch 150 Channel Temperature C Operating Ambient Temperature Topr -40 to +85 C Storage Temperature Range Tstg -55 to +150 C 1(G) 3,4(S) 2 Note *1 FR4 board (25.4mm25.4mmt1.0mm)Min Cu 36mm Copper. *2 FR4 board (25.4mm25.4mmt1.0mm)Full Cu. *3 Ceramic substrate (70mm70mmt1.0mm). *4 t = 10 s, Duty Cycle 1 % 1 of 5 Page Established : 2015/01/19 Revised : 2018/02/08 1.0 (0.25) 0.5 0.1Doc No. TT4-EA-14960 Revision. 3 Product Standards MOS FET FJ4B01120L Electrical Characteristics Ta = 25 C 3 C Parameter Symbol Conditions Min Typ Max Unit Drain-source Breakdown Voltage VDSS ID = -1 mA, VGS = 0 -12 V Zero Gate Voltage Drain Current IDSS VDS = -12 V, VGS = 0 -1 A Gate-source Leakage Current IGSS VGS = 8 V, VDS = 0 V 10 A Gate-source Threshold Voltage Vth ID = -2 mA, VDS = -10 V -0.3 -1.0 V RDS(on)1 ID = -2 A, VGS = -4.5 V 34 51 RDS(on)2 ID = -2 A, VGS = -2.5 V 40 61 Drain-source On-state Resistance m RDS(on)3 ID = -0.2 A, VGS = -1.8 V 48 85 RDS(on)4 ID = -0.1 A, VGS = -1.5 V 57 170 Body Diode Forward Voltage VF(s-d) IF = -0.2 A, VGS = 0 V -0.7 -1.2 V *1 Ciss 814 Input Capacitance VDS = -10 V, VGS = 0 V *1 Coss 201 pF Output Capacitance f = 1 MHz *1 Crss 187 Reverse Transfer Capacitance *1,*2 td(on) VDD = -6 V, VGS = 0 to -4.5 V 6 Turn-on Delay Time *1,*2 tr ID = -1 A 4 Rise Time ns *1,*2 td(off) VDD = -6 V, VGS = -4.5 to 0 V 63 Turn-off Delay Time *1,*2 tf ID = -1 A 46 Fall Time *1 Qg 10.7 Total Gate Charge VDD = -6 V, VGS = -4.5 V *1 Qgs 1.4 nC Gate-source Charge ID = -1 A *1 Qgd 2.1 Gate-drain Charge Note Measuring methods are based on JAPANESE INDUSTRIAL STANDARD JIS C 7030 Measuring methods for transistors. *1 Guaranteed by design, not subject to production testing. *2 Measurement circuit for Turn-on Delay Time / Rise Time / Turn-off Delay Time / Fall Time. VDD = -6 V 10 % ID = -1 A RL = 6 Vin 90 % Vout D 90 % 50 G Vin Vout 10 % 50 0 V S -4.5 V PW = 10 s D.C. 1 % td(off) tf td(on) tr Electrical State Discharge Characteristics Standard Test Type Symbol Conditions Class Value Unit Human Body Model HBM C = 100 pF, R = 1.5 k > 1k to 2k H1C V AEC-Q101 Machine Model MM C = 200 pF, R = 0 M2 > 100 to 200 V Page 2 of 5 Established : 2015/01/19 Revised : 2018/02/08