Doc No. TT4-EA-12484
Revision. 2
Product Standards
MOS FET
FJ6K01010L
FJ6K01010L
Silicon P-channel MOS FET
Unit : mm
2.0
For switching
0.2 0.13
6 5 4
Features
Low drain-source On-state resistance : RDS (on) typ. = 26 m ( VGS = -4.5 V )
Low drive voltage : 1.8 V drive
Halogen-free / RoHS compliant
(EU RoHS / UL-94 V-0 / MSL:Level 1 compliant)
12 3
0.7
Marking Symbol :
T4
(0.65)(0.65)
1.3
Packaging
Embossed type (Thermo-compression sealing): 3 000 pcs / reel (standard)
1. Drain 4. Source
2. Drain 5. Drain
3. Gate 6. Drain
Panasonic WSMini6-F1-B
Absolute Maximum Ratings Ta = 25 C
JEITA SC-113DA
Parameter Symbol Rating Unit
Drain-source voltage VDS -12 V Code
Gate-source voltage VGS 8 V
Drain current ID -4.0 A
Internal Connection
Pulse drain current IDp -20 A
*1
PD 700 mW
Total power dissipation
(D) (D) (S)
6 5 4
Channel temperature Tch 150 C
Operating ambient temperature Topr -40 to + 85 C
Storage temperature Tstg -55 to +150
C
Note) *1 Measuring on Glass epoxy board (25.4 x 25.4 x 0.8 mm) (See Figure 1)
Absolute maximum rating without heat sink for PD is 150 mW
1 2 3
(D) (D) (G)
Pin Name
1. Drain 4. Source
2. Drain 5. Drain
3. Gate 6. Drain
Figure 1 FR4 Glass-Epoxy Board
25.4 mm 25.4 mm 0.8 mm
Page 1of 6
Established : 2010-04-05
Revised : 2013-07-01
1.7
2.1Doc No. TT4-EA-12484
Revision. 2
Product Standards
MOS FET
FJ6K01010L
Electrical Characteristics Ta = 25 C 3C
Parameter Symbol Conditions Min Typ Max Unit
Drain-source breakdown voltage VDSS ID = -1 mA, VGS = 0 -12 V
Drain-source cutoff current IDSS VDS = -10 V, VGS = 0 -1.0 A
Gate-source cutoff current IGSS VGS = 8 V, VDS = 0 10 A
Gate threshold voltage Vth ID = -1.0 mA, VDS = -6.0 V -0.3 -0.65 -1.0 V
RDS(on)1 ID = -1.0 A, VGS = -4.5 V 26 34
RDS(on)2
Drain-source ON resistance ID = -0.5 A, VGS = -2.5 V 30 41 m
RDS(on)3 ID = -0.5 A, VGS = -1.8 V 36 54
Forward transfer admittance |Yfs| ID = -1.0 A, VDS = -10 V 4.0 S
Input capacitance Ciss 1 400 pF
Output capacitance Coss VDS = -10 V, VGS = 0, f = 1 MHz 190 pF
Reverse transfer capacitance Crss 210 pF
*1
td(on) VDD = -6 V, VGS = 0 to -4 V 9 ns
Turn-on delay time
*1
tr ID = -1.0 A 40 ns
Rise time
*1
td(off) VDD = -6 V, VGS = -4 to 0 V 250 ns
Turn-off delay time
*1
tf ID = -1.0 A 150 ns
Fall time
Note) 1. Measuring methods are based on JAPANESE INDUSTRIAL STANDARD JIS C 7030 Measuring methods for transistors.
2.
*1 Measurement circuit for Turn-on Delay Time/Rise Time/Turn-off Delay Time/Fall Time
Page 2of 6
Established : 2010-04-05
Revised : 2013-07-01