M74HC377 OCTAL D TYPE FLIP FLOP HIGH SPEED : f = 66 MHz (TYP.) at V = 6V MAX CC LOW POWER DISSIPATION: I =4A(MAX.) at T =25C CC A HIGH NOISE IMMUNITY: V = V = 28 % V (MIN.) NIH NIL CC DIP SOP TSSOP SYMMETRICAL OUTPUT IMPEDANCE: I = I = 4mA (MIN) OH OL BALANCED PROPAGATION DELAYS: t t PLH PHL ORDER CODES WIDE OPERATING VOLTAGE RANGE: PACKAGE TUBE T & R V (OPR) = 2V to 6V CC DIP M74HC377B1R PIN AND FUNCTION COMPATIBLE WITH SOP M74HC377M1R M74HC377RM13TR 74 SERIES 377 TSSOP M74HC377TTR DESCRIPTION The M74HC377 is an high speed CMOS OCTAL to the transition time of the positive going pulse. D TYPE FLIP FLOP fabricated with silicon gate When the clock input is at either the high or low 2 C MOS technology. level, the D input signal has no effect at the output. Information at the D inputs meeting the setup time All inputs are equipped with protection circuits requirements is transferred to the Q outputs on the against static discharge and transient excess positive going edge of the clock pulse if the enable voltage. input G is low. Clock triggering occurs at a particular voltage level and is not directly related PIN CONNECTION AND IEC LOGIC SYMBOLS July 2001 1/11 Obsolete Product(s) - Obsolete Product(s)M74HC377 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL NAME AND FUNCTION Data Enable Input (Active 1 G LOW) 2, 5, 6, 9, 12, 1Q to 8Q Flip Flop Outputs 15, 16, 19 3, 4, 7, 8, 13, 1D to 8D Data Inputs 14, 17, 18 Clock Input (LOW to 11 CLOCK HIGH, Edge Triggered) 10 GND Ground (0V) 20 Vcc Positive Supply Voltage TRUTH TABLE INPUTS OUTPUTS G CLOCK DATA Q H X X NO CHANGE LLL LHH X X NO CHANGE X : Dont Care LOGIC DIAGRAM This logic diagram has not be used to estimate propagation delays 2/11 Obsolete Product(s) - Obsolete Product(s)