TSM680P06D Taiwan Semiconductor Dual P-Channel MOSFET -60V, -12A, 68m FEATURES KEY PERFORMANCE PARAMETERS Fast switching PARAMETER VALUE UNIT Low thermal resistance package V -60 V DS Low profile package V = -10V 68 R DS(on) GS Pb-free plating m (max) V = -4.5V 110 Compliant to RoHS directive 2011/65/EU and in GS accordance to WEEE 2002/96/EC Q 16.4 nC g Halogen-free according to IEC 61249-2-21 definition APPLICATION Power Supply Motor Control PDFN56 Dual Dual P-Channel MOSFET Note: MSL 1 (Moisture Sensitivity Level) per J-STD-020 ABSOLUTE MAXIMUM RATINGS (T = 25C unless otherwise noted) A PARAMETER SYMBOL LIMIT UNIT Drain-Source Voltage V -60 V DS Gate-Source Voltage V 20 V GS T = 25C -12 C (Note 1) Continuous Drain Current I A D T = 100C -8 C (Note 2) Pulsed Drain Current I -48 A DM Total Power Dissipation T = 25C P 3.5 W C DTOT (Note 3) Single Pulsed Avalanche Energy E 7.2 mJ AS (Note 3) Single Pulsed Avalanche Current I 12 A AS Operating Junction and Storage Temperature Range T , T - 55 to +150 C J STG THERMAL PERFORMANCE PARAMETER SYMBOL LIMIT UNIT Junction to Case Thermal Resistance R 4.5 C/W JC Junction to Ambient Thermal Resistance R 85 C/W JA Notes: R is the sum of the junction-to-case and case-to-ambient thermal resistances. The case thermal reference is defined JA at the solder mounting surface of the drain pins. R is guaranteed by design while R is determined by the users board JA CA design. R shown below for single device operation on FR-4 PCB in still air JA Document Number:DS P0000162 1 Version: B1710 TSM680P06D Taiwan Semiconductor ELECTRICAL SPECIFICATIONS (T = 25C unless otherwise noted) A PARAMETER CONDITIONS SYMBOL MIN TYP MAX UNIT (Note 4) Static Drain-Source Breakdown Voltage V = 0V, I = -250A BV -60 -- -- V GS D DSS Gate Threshold Voltage V = V , I = -250A V DS GS D GS(TH) -1.2 -1.6 -2.5 V Gate Body Leakage V = 20V, V = 0V I -- -- 100 nA GS DS GSS V = -60V, V = 0V -- -- -1 DS GS Zero Gate Voltage Drain Current I A DSS V = -48V, Tc = 125C -- -- -10 DS V = -10V, I = -6A -- 54 68 GS D Drain-Source On-State Resistance R m DS(on) V = -4.5V, I = -3A -- 90 110 GS D Forward Transconductance V = -10V, I = -6A S DS D g -- 8.5 -- fs (Note 5) Dynamic Total Gate Charge Q -- 16.4 -- g V = -30V, I = -6A, DS D Gate-Source Charge Q -- 2.8 -- nC gs V = -10V GS Gate-Drain Charge Q -- 3.6 -- gd Input Capacitance C -- 870 -- iss V = -30V, V = 0V, DS GS Output Capacitance C -- 70 -- pF oss f = 1.0MHz Reverse Transfer Capacitance C -- 42 -- rss (Note 6) Switching Turn-On Delay Time t -- 8.3 -- d(on) Turn-On Rise Time t -- 42.4 -- V = -30V, I = -1A, r DD D ns R =6 Turn-Off Delay Time t -- 64.6 -- GEN d(off) Turn-Off Fall Time t f -- 16.4 -- (Note 4) Source-Drain Diode Maximum Continuous Drain-Source I -- -- -12 A S Diode Forward Current Integral reverse diode Maximum Pulse Drain-Source in the MOSFET I -- -- -48 A SM Diode Forward Current Diode-Source Forward Voltage V = 0V, I = -1A V -- -- -1 V GS S SD Notes: 1. Current limited by package 2. Pulse width limited by the maximum junction temperature o 3. L = 0.1mH, I = -12A, V = -25V, R = 25, Starting T = 25 C AS DD G J 4. Pulse test: PW 300s, duty cycle 2% 5. For DESIGN AID ONLY, not subject to production testing. 6. Switching time is essentially independent of operating temperature. Document Number:DS P0000162 2 Version: B1710