The SN74HCT74N is a dual positive edge-triggered D-type flip-flop with separate data (D), clock (CP), clear (CLR) and preset (PR) inputs and corresponding Q, Q outputs. The device is designed for two-phase clock operation with one flip-flop active and the other inactive during each phase. Data is entered on the rising edge of the clock and is available on the falling edge. The outputs will change state synchronously with the active clock input. Typically, the active edge is low. This model contains two independent flip-flops that do not share common clock or control lines. The clear and preset inputs are asynchronous active-low inputs, which configure the flip-flop independently of the clock. When preset is low, the Q output is high and the Q output is low. Similarly, when clear is low, the Q output is low and the Q output is high. The device is designed ceings with high noise immunity at the frequency range of 0 to 50MHz. This device is ideal for use in low-power, high-noise immunity and low-voltage applications.