SSM6N24TU TOSHIBA Field Effect Transistor Silicon N Channel MOS Type (U-MOSIII) SSM6N24TU High Speed Switching Applications Unit: mm Optimum for high-density mounting in small packages 2.10.1 Low on-resistance: R = 145m (max) ( V = 4.5 V) on GS 1.70.1 R = 180m (max) ( V = 2.5 V) on GS 1 6 Absolute Maximum Ratings (Ta = 25C) 5 2 Characteristics Symbol Rating Unit 4 3 Drain-Source voltage V 30 V DS Gate-Source voltage V 12 V GSS DC I 0.5 D Drain current A Pulse I 1.5 DP P D Drain power dissipation 500 mW 1.Source1 4.Source2 (Note 1) 2.Gate1 5.Gate2 Channel temperature T 150 C ch 3.Drain2 6.Drain1 Storage temperature range T 55 to 150 C stg UF6 Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in JEDEC temperature, etc.) may cause this product to decrease in the JEITA reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the TOSHIBA 2-2T1B absolute maximum ratings. Weight: 7.0 mg (typ.) Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (Handling Precautions/Derating Concept and Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 1: Mounted on FR4 board. (total dissipation) 2 (25.4 mm 25.4 mm 1.6 t, Cu Pad: 645 mm ) Marking Equivalent Circuit (top view) 6 5 4 6 5 4 Q1 NF Q2 123 1 2 3 Handling Precaution When handling individual devices (which are not yet mounted on a circuit board), be sure that the environment is protected against electrostatic electricity. Operators should wear anti-static clothing, and containers and other objects that come into direct contact with devices should be made of anti-static materials. Start of commercial production 2004-01 1 2014-03-01 2.00.1 1.30.1 0.70.05 0.65 0.65 +0.06 0.16-0.05 +0.1 0.3-0.05SSM6N24TU Electrical Characteristics (Ta = 25C) Characteristics Symbol Test Condition Min Typ. MaxUnit Gate leakage current I V = 12 V, V = 0 1 A GSS GS DS V I = 1 mA, V = 0 30 (BR) DSS D GS Drain-Source breakdown voltage V V I = 1 mA, V = 12 V 18 (BR) DSX D GS Drain cut-off current I V = 30 V, V = 0 1 A DSS DS GS Gate threshold voltage V V = 3 V, I = 0.1 mA 0.5 1.1 V th DS D Forward transfer admittance Y V = 3 V, I = 0.25 A (Note2) 1.0 2.0 S fs DS D I = 0.50 A, V = 4.5 V (Note2) 120 145 D GS Drain-Source on-resistance R m DS (ON) I = 0.25 A, V = 2.5 V (Note2) 140 180 D GS Input capacitance C V = 10 V, V = 0, f = 1 MHz 245 pF iss DS GS Reverse transfer capacitance C V = 10 V, V = 0, f = 1 MHz 33 pF rss DS GS Output capacitance C V = 10 V, V = 0, f = 1 MHz 41 pF oss DS GS Turn-on time t V = 10 V, I = 0.25 A, 9 on DD D Switching time ns Turn-off time t V = 0~2.5 V, R = 4.7 15 GS G off Note2: Pulse test Switching Time Test Circuit (a) Test Circuit (b) V IN 2.5 V 90% OUT 2.5 V IN 10% 0 V 0 V DD (c) V 10 s OUT 10% V DD 90% V = 10 V DD V DS (ON) R = 4.7 t t G r f Duty 1% t t V : t , t < 5 ns on off IN r f Common Source Ta = 25C Precaution V can be expressed as the voltage between gate and source when the low operating current value is I =100 A for th D this product. For normal switching operation, V requires a higher voltage than V and V requires a lower GS (on) th GS (off) voltage than V th. (The relationship can be established as follows: V < V < V ) GS (off) th GS (on) Please take this into consideration when using the device. 2 2014-03-01 R G