IRFIB5N65A, SiHFIB5N65A Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY Low Gate Charge Q Results in Simple Drive g V (V) 650 DS Available Requirement R ()V = 10 V 0.93 DS(on) GS RoHS* Improved Gate, Avalanche and Dynamic dV/dt COMPLIANT Q (Max.) (nC) 48 g Ruggedness Q (nC) 12 gs Fully Characterized Capacitance and Avalanche Voltage and Current Q (nC) 19 gd Compliant to RoHS directive 2002/95/EC Configuration Single D APPLICATIONS TO-220 FULLPAK Switch Mode Power Supply (SMPS) Uninterruptible Power Supply High Speed Power Switching G High Voltage Isolation = 2.5 kV (t = 60 s, f = 60 Hz) RMS TYPICAL SMPS TOPOLOGIES S Single Transistor Flyback S D G N-Channel MOSFET Single Transistor Forward ORDERING INFORMATION Package TO-220 FULLPAK IRFIB5N65APbF Lead (Pb)-free SiHFIB5N65A-E3 IRFIB5N65A SnPb SiHFIB5N65A ABSOLUTE MAXIMUM RATINGS T = 25 C, unless otherwise noted C PARAMETER SYMBOLLIMITUNIT Drain-Source Voltage V 650 DS V Gate-Source Voltage V 30 GS e Continuous Drain Current T = 25 C 5.1 C V at 10 V I GS D Continuous Drain Current T = 100 C 3.2 A C a Pulsed Drain Current I 21 DM Linear Derating Factor 0.48 W/C b Single Pulse Avalanche Energy E 325 mJ AS a Repetitive Avalanche Current I 5.2 A AR a Repetitive Avalanche Energy E 6mJ AR Maximum Power Dissipation T = 25 C P 60 W C D c Peak Diode Recovery dV/dt dV/dt 2.8 V/ns Operating Junction and Storage Temperature Range T , T - 55 to + 150 J stg C d Soldering Recommendations (Peak Temperature) for 10 s 300 10 lbf in Mounting Torque 6-32 or M3 screw 1.1 N m Notes a. Repetitive rating pulse width limited by maximum junction temperature (see fig. 11). b. Starting T = 25 C, L = 24 mH, R = 25 , I = 5.2 A (see fig. 12). J G AS c. I 5.2 A, dI/dt 90 A/s, V V , T 150 C. SD DD DS J d. 1.6 mm from case. e. Drain current limited by maximum junction temperature. * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91174 www.vishay.com S09-0518-Rev. B, 13-Apr-09 1IRFIB5N65A, SiHFIB5N65A Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOLTYP. MAX. UNIT Maximum Junction-to-Ambient R -65 thJA C/W Maximum Junction-to-Case (Drain) R -2.1 thJC SPECIFICATIONS T = 25 C, unless otherwise noted J PARAMETER SYMBOLTEST CONDITIONS MIN.TYP.MAX.UNIT Static Drain-Source Breakdown Voltage V V = 0 V, I = 250 A 650 - - V DS GS D d V Temperature Coefficient V /T Reference to 25 C, I = 1 mA - 670 - mV/C DS DS J D Gate-Source Threshold Voltage V V = V , I = 250 A 2.0 - 4.0 V GS(th) DS GS D Gate-Source Leakage I V = 30 V - - 100 nA GSS GS V = 650 V, V = 0 V - - 25 DS GS Zero Gate Voltage Drain Current I A DSS V = 520 V, V = 0 V, T = 125 C - - 250 DS GS J b Drain-Source On-State Resistance R V = 10 V I = 3.1 A - - 0.93 DS(on) GS D Forward Transconductance g V = 50 V, I = 3.1 A 3.9 - - S fs DS D Dynamic Input Capacitance C - 1417 - iss V = 0 V, GS Output Capacitance C -V = 25 V, 177- oss DS f = 1.0 MHz, see fig. 5 Reverse Transfer Capacitance C -7.0- rss pF = 1.0 V, f = 1.0 MHz - 1912 - V DS Output Capacitance C oss V = 0 V V = 520 V, f = 1.0 MHz - 48 - GS DS c Effective Output Capacitance C eff. V = 0 V to 520 V -84 - oss DS Total Gate Charge Q -- 48 g I = 5.2 A, V = 400 V D DS Gate-Source Charge Q --V = 10 V 12 nC gs GS b see fig. 6 and 13 Gate-Drain Charge Q --19 gd Turn-On Delay Time t -14 - d(on) V = 325 V, I = 5.2 A DD D Rise Time t -20 - r R = 9.1 , R = 62 , ns G D b Turn-Off Delay Time t -34- d(off) see fig. 10 Fall Time t -18- f Drain-Source Body Diode Characteristics MOSFET symbol D Continuous Source-Drain Diode Current I -- 5.2 S showing the A integral reverse G a Pulsed Diode Forward Current I p - n junction diode -- 21 SM S b Body Diode Voltage V T = 25 C, I = 5.2 A, V = 0 V -- 1.5 V SD J S GS Body Diode Reverse Recovery Time t - 493 739 ns rr b T = 25 C, I = 5.2 A, dI/dt = 100 A/s J F Body Diode Reverse Recovery Charge Q -2.1 3.2 C rr Forward Turn-On Time t Intrinsic turn-on time is negligible (turn-on is dominated by L and L ) on S D Notes a. Repetitive rating pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width 300 s duty cycle 2 %. c. C eff. is a fixed capacitance that gives the same charging time as C while V is rising from 0 % to 80 % V . oss oss DS DS d. t = 60 s, f = 60 Hz. www.vishay.com Document Number: 91174 2 S09-0518-Rev. B, 13-Apr-09