IRFZ34S, IRFZ34L, SiHFZ34S, SiHFZ34L www.vishay.com Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY Advanced process technology V (V) 60 DS Surface mount R ( )V = 10 V 0.050 DS(on) GS Low-profile through-hole (IRFZ34L, SiHFZ34L) Available Q (Max.) (nC) 46 g 175 C operating temperature Q (nC) 11 gs Fast switching Available Q (nC) 22 gd Material categorization: for definitions of compliance please see Configuration Single www.vishay.com/doc 99912 Note D * This datasheet provides information about parts that are 2 2 D PAK (TO-263) I PAK (TO-262) RoHS-compliant and / or parts that are non-RoHS-compliant. For example, parts with lead (Pb) terminations are not RoHS-compliant. Please see the information / tables in this datasheet for details. DESCRIPTION G G D S Third generation power MOSFETs from Vishay utilize D S G advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that S Power MOSFETs are well known for, provides the designer N-Channel MOSFET with an extremely efficient and reliable device for use in a wide variety of applications. 2 The D PAK is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The 2 D PAK is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2 W in a typical surface mount application. The through-hole version (IRFZ34L, SiHFZ34L) is available for low-profile applications. ORDERING INFORMATION 2 2 2 Package D PAK (TO-263) D PAK (TO-263) I PAK (TO-262) Lead (Pb)-free and halogen-free SiHFZ34S-GE3 SiHFZ34STRL-GE3 SiHFZ34L-GE3 a Lead (Pb)-free IRFZ34SPbF IRFZ34STRLPbF IRFZ34LPbF Note a. See device orientation. ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) C PARAMETER SYMBOLLIMITUNIT Drain-Source Voltage V 60 DS V Gate-Source Voltage V 20 GS T = 25 C 30 C Continuous Drain Current V at 10 V I GS D T = 100 C 21 A C a, e Pulsed Drain Current I 120 DM Linear Derating Factor 0.59 W/C b, e Single Pulse Avalanche Energy E 200 mJ AS T = 25 C 88 C Maximum Power Dissipation P W D T = 25 C 3.7 A c, e Peak Diode Recovery dV/dt dV/dt 4.5 V/ns Operating Junction and Storage Temperature Range T , T -55 to +175 J stg C d Soldering Recommendations (Peak temperature) for 10 s 300 Notes a. Repetitive rating pulse width limited by maximum junction temperature (see fig. 11). b. V = 25 V, Starting T = 25 C, L = 260 H, R = 25 , I = 30 A (see fig. 12). DD J g AS c. I 30 A, dI/dt 200 A/s, V V , T 175 C. SD DD DS J d. 1.6 mm from case. e. Uses IRFZ34, SiHFZ34 data and test conditions. S15-1659-Rev. D, 20-Jul-15 Document Number: 90368 1 For technical questions, contact: hvm vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000IRFZ34S, IRFZ34L, SiHFZ34S, SiHFZ34L www.vishay.com Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOLTYP. MAX. UNIT Maximum Junction-to-Ambient R -40 thJA a (PCB mount) C / W Maximum Junction-to-Case (Drain) R -1.7 thJC Note a. When mounted on 1 square PCB (FR-4 or G-10 material). SPECIFICATIONS (T = 25 C, unless otherwise noted) J PARAMETER SYMBOLTEST CONDITIONS MIN.TYP.MAX.UNIT Static Drain-Source Breakdown Voltage V V = 0 V, I = 250 A 60 - - V DS GS D c V Temperature Coefficient V /T Reference to 25 C, I = 1 mA -0.065 - V/C DS DS J D Gate-Source Threshold Voltage V V = V , I = 250 A 2.0 - 4.0 V GS(th) DS GS D Gate-Source Leakage I V = 20 V - - 100 nA GSS GS V = 60 V, V = 0 V - - 25 DS GS Zero Gate Voltage Drain Current I A DSS V = 48 V, V = 0 V, T = 150 C - - 250 DS GS J b Drain-Source On-State Resistance R V = 10 V I = 18 A - - 0.05 DS(on) GS D b Forward Transconductance g V = 25 V, I = 18 A 9.3 - - S fs DS D Dynamic Input Capacitance C - 1200 - iss V = 0 V, GS Output Capacitance C -V = 25 V, 600- pF oss DS c f = 1.0 MHz, see fig. 5 Reverse Transfer Capacitance C -100- rss Total Gate Charge Q -- 46 g I = 30 A, V = 48 V, D DS Gate-Source Charge Q --V = 10 V 11 nC gs GS b, c see fig. 6 and 13 Gate-Drain Charge Q --22 gd Turn-On Delay Time t -13 - d(on) Rise Time t - 100 - r V = 30 V, I = 30 A, DD D ns b, c R = 12 , R = 1.0 , see fig. 10 g D Turn-Off Delay Time t -29- d(off) Fall Time t -52- f Internal Source Inductance L Between lead, and center of die contact - 7.5 - nH S Drain-Source Body Diode Characteristics D MOSFET symbol Continuous Source-Drain Diode Current I -- 30 S showing the A G integral reverse a Pulsed Diode Forward Current I -- 120 SM p - n junction diode S b Body Diode Voltage V T = 25 C, I = 30 A, V = 0 V -- 1.6 V SD J S GS Body Diode Reverse Recovery Time t - 120 230 ns rr b, c T = 25 C, I = 30 A, dI/dt = 100 A/s J F Body Diode Reverse Recovery Charge Q - 700 1400 C rr Forward Turn-On Time t Intrinsic turn-on time is negligible (turn-on is dominated by L and L ) on S D Notes a. Repetitive rating pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width 300 s duty cycle 2 %. c. Uses IRFZ34, SiHFZ34 data and test conditions. S15-1659-Rev. D, 20-Jul-15 Document Number: 90368 2 For technical questions, contact: hvm vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000