Si7434DP Vishay Siliconix N-Channel 250-V (D-S) MOSFET FEATURES PRODUCT SUMMARY Halogen-free According to IEC 61249-2-21 V (V) R ()I (A) DS DS(on) D Available 0.155 at V = 10 V 3.8 GS PWM-OptimizedTrenchFET Power MOSFET 250 100 % R Tested 0.162 at V = 6 V 3.7 GS g Avalanche Tested APPLICATIONS Primary Side Switch In: D - Telecom Power Supplies PowerPAK SO-8 - Distributed Power Architectures - Miniature Power Modules S 6.15 mm 5.15 mm 1 S 2 S 3 G G 4 D 8 D 7 D 6 D 5 Bottom View S Ordering Information: Si7434DP-T1-E3 (Lead (Pb)-free) Si7434DP-T1-GE3 (Lead (Pb)-free and Halogen-free) N-Channel MOSFET ABSOLUTE MAXIMUM RATINGS T = 25 C, unless otherwise noted A Parameter Symbol 10 s Steady State Unit Drain-Source Voltage V 250 DS V Gate-Source Voltage V 20 GS T = 25 C 3.8 2.3 A a I Continuous Drain Current (T = 150C) D J T = 70 C 3.0 1.8 A I 40 A Pulsed Drain Current DM a I 4.3 1.6 Continuous Source Current (Diode Conduction) S Avalanche Current L = 1.0 mH I 13 AS E Single Pulse Avalanche Energy 8.4 mJ AS T = 25 C 5.2 1.9 A a P W Maximum Power Dissipation D T = 70 C 3.3 1.2 A T , T Operating Junction and Storage Temperature Range - 55 to 150 J stg C b,c 260 Soldering Recommendations (Peak Temperature) THERMAL RESISTANCE RATINGS Parameter Symbol TypicalMaximumUnit t 10 s 19 24 a R Maximum Junction-to-Ambient thJA Steady State 52 65 C/W Maximum Junction-to-Case (Drain) Steady State R 1.5 1.8 thJC Notes: a. Surface Mounted on 1 x 1 FR4 board. b. See Solder Profile (www.vishay.com/ppg 73257). The PowerPAK 1212-8 is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. c. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components. Document Number: 72579 www.vishay.com S09-0271-Rev. C, 16-Feb-09 1Si7434DP Vishay Siliconix SPECIFICATIONS T = 25 C, unless otherwise noted J Parameter Symbol Test Condition Min.Typ.Max.Unit Static V V = V , I = 250 A Gate Threshold Voltage 2.0 4.0 V GS(th) DS GS D I V = 0 V, V = 20 V Gate-Body Leakage 100 nA GSS DS GS V = 250 V, V = 0 V 1 DS GS I Zero Gate Voltage Drain Current A DSS V = 250 V, V = 0 V, T = 55 C 15 DS GS J a I V 5 V, V = 10 V 30 A On-State Drain Current D(on) DS GS V = 10 V, I = 3.8 A 0.129 0.155 GS D a R Drain-Source On-State Resistance DS(on) V = 6.0 V, I = 3.7 A 0.131 0.162 GS D a g V = 15 V, I = 3.8 A 14 S Forward Transconductance fs DS D a V I = 2.8 A, V = 0 V 0.75 1.2 V Diode Forward Voltage SD S GS b Dynamic Total Gate Charge Q 34 50 g Q V = 100 V, V = 10 V, I = 3.8 A Gate-Source Charge 6.8 nC gs DS GS D Gate-Drain Charge Q 10.5 gd R Gate Resistance 0.6 1.2 1.8 g Turn-On Delay Time t 16 25 d(on) t Rise Time V = 100 V, R = 25 23 35 r DD L I 4.0 A, V = 10 V, R = 6 Turn-Off Delay Time t 47 70 D GEN g d(off) ns t Fall Time 19 30 f Source-Drain Reverse Recovery t I = 2.8 A, dI/dt = 100 A/s 100 150 rr F Time Notes a. Pulse test pulse width 300 s, duty cycle 2 %. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. TYPICAL CHARACTERISTICS 25 C, unless otherwise noted 30 40 V = 10 V thru 6 V GS 35 24 30 25 18 5 V 20 12 15 T = 125 C C 10 6 25 C 5 - 55 C 0 0 02468 10 0123456 V - Drain-to-Source Voltage (V) DS V - Gate-to-Source Voltage (V) GS Output Characteristics Transfer Characteristics www.vishay.com Document Number: 72579 2 S09-0271-Rev. C, 16-Feb-09 I - Drain Current (A) D I - Drain Current (A) D