8901E xxx Si8901EDB Vishay Siliconix Bi-Directional P-Channel 20-V (D-S) MOSFET FEATURES PRODUCT SUMMARY TrenchFET Power MOSFET V (V) R ()I (A) S1S2 S1S2(on) S1S2 Ultra-Low R SS(on) 0.060 at V = - 4.5 V - 4.4 GS ESD Protected: 6000 V RoHS COMPLIANT - 20 0.080 at V = - 2.5 V - 3.9 GS MICRO FOOT Chipscale Packaging Reduces Footprint Area, Profile (0.65 mm) 0.105 at V = - 1.8 V - 3.4 GS and On-Resistance Per Footprint Area APPLICATIONS Smart Batteries for Portable Devices S 1 MICRO FOOT Bump Side View Backside View G 1 S 5 4 S 2 2 5.4 k Pin 1 Identifier 5.4 k G 6 3 G 2 1 Device Marking: G 2 8901E = P/N Code xxx = Date/Lot Traceability Code S 1 2 S Ordering Information: 1 1 Si8901EDB-T2-E1 (Lead (Pb)-free) P-Channel S 2 ABSOLUTE MAXIMUM RATINGS T = 25 C, unless otherwise noted A Parameter Symbol 5 s Steady State Unit V Source1- Source2 Voltage - 20 S1S2 V V Gate-Source Voltage 12 GS T = 25 C - 4.4 - 3.5 A a I Continuous Source1- Source2 Current (T = 150 C) S1S2 J T = 85 C - 3.2 - 2.5 A A I Pulsed Source1- Source2 Current - 10 SM T = 25 C 1.7 1 A a P W Maximum Power Dissipation D T = 85 C 0.8 0.5 A Operating Junction and Storage Temperature Range T , T - 55 to 150 C J stg c IR/Convection 260 Package Reflow Conditions THERMAL RESISTANCE RATINGS Parameter Symbol TypicalMaximumUnit t 5 s 60 75 a R Maximum Junction-to-Ambient thJA Steady State 95 120 C/W b R Steady State 18 22 Maximum Junction-to-Foot thJF Notes: a. Surface Mounted on 1 x 1 FR4 board. b. The foot is defined as the top surface of the package. c. Refer to IPC/JEDEC (J-STD-020C), no manual or hand soldering. Document Number: 72941 www.vishay.com S-82119-Rev. C, 08-Sep-08 1Si8901EDB Vishay Siliconix SPECIFICATIONS T = 25 C, unless otherwise noted J Parameter Symbol Test Conditions Min.Typ.Max.Unit Static V V = V , I = - 350 A Gate Threshold Voltage - 0.45 - 1.0 V GS(th) SS GS D V = 0 V, V = 4.5 V 4 A SS GS Gate-Body Leakage I GSS V = 0 V, V = 12 V 10 mA SS GS V = - 20 V, V = 0 V - 1 SS GS Zero Gate Voltage Source Current I A S1S2 V = - 20 V, V = 0 V, T = 85 C - 5 SS GS J a I V = - 5 V, V = - 4.5 V - 5 A On-State Source Current S(on) SS GS V = - 4.5 V, I = - 1 A 0.048 0.060 GS SS a R V = - 2.5 V, I = - 1 A 0.062 0.080 Source1- Source2 On-State Resistance S1S2(on) GS SS V = - 1.8 V, I = - 1 A 0.081 0.105 GS SS a g V = - 10 V, I = - 1 A 7S Forward Transconductance fs SS SS b Dynamic Turn-On Delay Time t 2.3 3.5 d(on) t Rise Time V = - 10 V, R = 10 2.2 3.5 r SS L s I - 1 A, V = - 4.5 V, R = 6 Turn-Off Delay Time t SS GEN g 1.3 2 d(off) t Fall Time 914 f Notes: a. Pulse test pulse width 300 s, duty cycle 2 %. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. TYPICAL CHARACTERISTICS 25 C, unless otherwise noted 10 10 000 I at 25 C (mA) GSS 1000 8 100 6 T = 150 C J 10 4 1 T = 25 C J 2 0.1 0.01 0 0 3 6 9 12 15 0 36 9 12 15 V - Gate-to-Source Voltage (V) V - Gate-to-Source Voltage (V) GS GS Gate-Current vs. Gate-Source Voltage Gate Current vs. Gate-Source Voltage www.vishay.com Document Number: 72941 2 S-82119-Rev. C, 08-Sep-08 I - Gate Current (mA) GSS I - Gate Current (A) GSS