SiR172DP Vishay Siliconix N-Channel 30-V (D-S) MOSFET FEATURES PRODUCT SUMMARY Halogen-free According to IEC 61249-2-21 a, g Definition V (V) R () Q (Typ.) I (A) DS DS(on) g D TrenchFET Power MOSFET 0.0089 at V = 10 V 20 GS Low Thermal Resistance PowerPAK Package 30 9.8 nC 0.0124 at V = 4.5 V 20 GS with Low 1.07 mm Profile Optimized for High-Side Synchronous Rectifier Operation PowerPAK SO-8 100 % R and UIS Tested g Compliant to RoHS Directive 2002/95/EC S 6.15 mm 5.15 mm APPLICATIONS 1 S 2 Notebook CPU Core S 3 - High-Side Switch G 4 D D 8 D 7 D 6 D 5 G Bottom View Ordering Information: SiR172DP-T1-GE3 (Lead (Pb)-free and Halogen-free) N-Channel MOSFET S ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) A Parameter Symbol LimitUnit V Drain-Source Voltage DS 30 V V Gate-Source Voltage GS 20 g T = 25 C C 20 g T = 70 C 20 C Continuous Drain Current (T = 150 C) I J D b, c T = 25 C A 16.1 b, c T = 70 C A 12.9 A I Pulsed Drain Current DM 50 g T = 25 C C 20 Continuous Source-Drain Diode Current I S b, c T = 25 C A 3.2 Single Pulse Avalanche Current I 21 AS L = 0.1 mH Avalanche Energy E mJ 22 AS T = 25 C 29.8 C T = 70 C 19 C P Maximum Power Dissipation W D b, c T = 25 C A 3.9 b, c T = 70 C A 2.5 T , T Operating Junction and Storage Temperature Range J stg - 55 to 150 C d, e Soldering Recommendations (Peak Temperature) 260 THERMAL RESISTANCE RATINGS Parameter Symbol TypicalMaximumUnit b, f R Maximum Junction-to-Ambient t 10 s thJA 27 32 C/W R Maximum Junction-to-Case (Drain) Steady State thJC 3.5 4.2 Notes: a. Base on T = 25 C. C b. Surface mounted on 1 x 1 FR4 board. c. t = 10 s. d. See Solder Profile (www.vishay.com/ppg 73257). The PowerPAK SO-8 is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components. f. Maximum under steady state conditions is 70 C/W. g. Package limited. Document Number: 65271 www.vishay.com S11-1647-Rev. B, 22-Aug-11 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000SiR172DP Vishay Siliconix SPECIFICATIONS (T = 25 C, unless otherwise noted) J Parameter Symbol Test Conditions Min.Typ.Max.Unit Static V V = 0 V, I = 250 A Drain-Source Breakdown Voltage 30 V DS GS D V /T V Temperature Coefficient 28 DS J DS I = 250 A mV/C D V /T V Temperature Coefficient - 5.5 GS(th) J GS(th) V V = V , I = 250 A Gate-Source Threshold Voltage 1.2 2.5 V GS(th) DS GS D I V = 0 V, V = 20 V Gate-Source Leakage 100 nA GSS DS GS V = 30 V, V = 0 V 1 DS GS I Zero Gate Voltage Drain Current A DSS V = 30 V, V = 0 V, T = 55 C 10 DS GS J a On-State Drain Current I V 5 V, V = 10 V 20 A D(on) DS GS V = 10 V, I = 16.1 A 0.0074 0.0089 GS D a R Drain-Source On-State Resistance DS(on) V = 4.5 V, I = 13.6 A 0.0103 0.0124 GS D a g V = 15 V, I = 16.1 A Forward Transconductance 49 S fs DS D b Dynamic Input Capacitance C 997 iss C V = 15 V, V = 0 V, f = 1 MHz Output Capacitance 195 pF oss DS GS Reverse Transfer Capacitance C 120 rss V = 15 V, V = 10 V, I = 16.1 A 19.5 30 DS GS D Q Total Gate Charge g 9.8 15 nC Q Gate-Source Charge V = 15 V, V = 4.5 V, I = 16.1 A 3.7 gs DS GS D Q Gate-Drain Charge 3.7 gd R Gate Resistance f = 1 MHz 0.2 1.2 2.4 g t Turn-On Delay Time 19 29 d(on) t Rise Time V = 15 V, R = 1.5 19 29 r DD L I 10 A, V = 4.5 V, R = 1 Turn-Off Delay Time t 19 29 D GEN g d(off) t Fall Time 13 20 f ns Turn-On Delay Time t 918 d(on) t Rise Time V = 15 V, R = 1.5 918 r DD L I 10 A, V = 10 V, R = 1 Turn-Off Delay Time t 18 27 D GEN g d(off) t Fall Time 815 f Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current I T = 25 C 20 S C A a I Pulse Diode Forward Current 50 SM Body Diode Voltage V I = 10 A 0.85 1.2 V SD S t Body Diode Reverse Recovery Time 14 28 ns rr Q Body Diode Reverse Recovery Charge 510 nC rr I = 10 A, dI/dt = 100 A/s, T = 25 C F J t Reverse Recovery Fall Time 7 a ns t Reverse Recovery Rise Time 7 b Notes: a. Pulse test pulse width 300 s, duty cycle 2 %. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. www.vishay.com Document Number: 65271 2 S11-1647-Rev. B, 22-Aug-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000