GFX OVERLAY 2D Graphics Overlay Module Rev. 1.5 Key Design Features Block Diagram Synthesizable, technology independent VHDL Core 2D bitmap overlays over real-time video 24-RGB pixels supported as standard - other formats (e.g. YCbCr 4:2:2) supported on request Supports all video resolutions up to 4096x4096 pixels No external memory or frame buffer required Bitmaps organized into tiles with a choice of four possible tile sizes: 8x8, 16x16, 32x32 or 64x64 Tiles organized into 3 bit-planes offering 3-bits/pixel Tile numbers written to a buffer that map directly to the display Programmable graphics-window position and size Programmable clip-box (clip-plane) region Figure 1: 2D Graphics overlay module architecture Independent horizontal and vertical scrolling Choice of 8 x 24-bit colours from a user defined palette or General Description per-pixel alpha blending with 8 levels of transparency Per-pixel alpha-blending removes jagged edges to give a GFX OVERLAY is a highly versatile on-screen display that allows high- smooth anti-aliased result quality anti-aliased bitmap graphics to be inserted over RGB video. The module supports a wide range of graphics effects and the programming User-defined 8-bit alpha transparency interface is very simple to use. The bitmap overlay is partitioned into an array of tiles which are addressed by means of an 8-bit value stored in a No complex programming required 64x64 tile buffer. There are four tile sizes available - either 8x8, 16x16, 32x32 or 64x64. Cascade any number of overlay cores in series for more The tiles in the buffer are displayed in a graphics window which may be complex graphical displays positioned anywhere within the display area. Bitmaps for each tile are stored in a user-defined ROM which can contain up to 256 different Optional I2C, SPI or UART interfaces for simple micro- bitmaps stored over three bit-planes. Depending on the chosen graphics processor programming mode, the 3-bits per pixel may be used to select one colour from a palette of eight, eight levels of alpha transparency or seven colours on a transparent background. Applications Pixels and syncs flow in and out of the overlay module in accordance with the valid-ready pipeline protocol. Pixels and syncs are sampled at the Professional and functional 2D graphic displays and video module inputs on a rising clock-edge when pixin val is high and pixin rdy overlays is high. Likewise, pixels and syncs are transferred out of the module on a rising clock-edge when pixout val is high and pixout rdy is high. The Digital TV and home-media solutions pipeline protocol allows both input and output interfaces to be stalled independently. Interactive guides, menus, tables, lists etc. The pipeline protocol is very versatile and permits any number of graphics overlay modules to be cascaded in series. By placing more than one Animated 2D graphics including hardware sprites, mouse module together, the user is able to achieve more complex 2D effects. pointers, cursors , parallax scrolling, moving banners etc. Figure 1 shows the architecture of the graphics overlay module in more Window movement in a similar manner to a 2D BitBlt detail. Instrumentation and monitoring applications including animated gauges, charts, dials, meters, counters etc. Informational displays and simple HUDs for commercial, military and automotive applications Copyright 2012 www.zipcores.com Download this VHDL Core Page 1 of 8GFX OVERLAY 2D Graphics Overlay Module Rev. 1.5 Generic Parameters Pin-out Description cont ... Generic name Description Type Valid Range Pin name I/O Description Active state tile size Tile size selection integer 0: small (8x8) tile en in Tile buffer enable high 1: medium (16x16) tile we in Tile buffer write enable high 2: large (32x32) 3: xlarge (64x64) tile wdata 7:0 in Tile buffer write data data use alpha Enable/disable boolean True / False tile col addr 5:0 in Tile buffer column address data alpha-blend support tile row addr 5:0 in Tile buffer row address data gfx mode Graphics mode integer 0: 1-colour with tile rdata 7:0 out Tile buffer read data data selection per-pixel alpha blending pixin 23:0 in 24-bit RGB source pixel in data 1: 8-colour palette pixin vsync in Vertical sync in high with 8-bit user (signifies start of frame) defined alpha pixin hsync in Horizontal sync in high (signifies start of line) 2: 7-colour palette with 8-bit user pixin val in Input pixel valid high defined alpha + pixin rdy out Ready to accept input pixel high transparent (handshake signal) background pixout 23:0 out 24-bit pixel out data pixels per line No. of pixels in each integer 4096 input video line pixout vsync out Vertical sync out high lines per frame No. of lines in each integer 4096 pixout hsync out Horizontal sync out high input video frame pixout val out Output pixel valid high pixout rdy in Ready to accept output high Pin-out Description pixel (handshake signal) Pin name I/O Description Active state Input pixel buffer / Address generator clk in Synchronous clock rising edge Source video pixels are sampled at the input pixel buffer. The generic reset in Asynchronous reset low parameters pixels per line and lines per frame must be set correctly to gfx alpha 7:0 in Alpha transparency of data match the exact number of pixels in x and y of the input video. graphics window region The main function of the input pixel buffer is to handle the valid-ready flow gfx colour0-7 23:0 in User defined palette of data control and to to generate the column and row addresses into the tile 8x24-bit colours buffer RAM. The circuit also detects whether the current pixel lies within gfx top x 11:0 in Top-left x position of data the graphics window defined by the parameters gfx top x, gfx top y, graphics-window gfx bot x and gfx bot y. If the current pixel lies outside the graphics window, the input pixel passes though unchanged. If the pixel lies inside gfx top y 11:0 in Top-left y-position of data the graphics window, then the pixel is processed in the graphics overlay graphics-window pipeline. gfx bot x 11:0 in Bottom-right x position of data As well as the graphics window, the user may also specify a clip-box graphics-window region. The clip-box is defined by the generic parameters clp top x, gfx bot y 11:0 in Bottom-right y position of data clp top y, clp bot x and clp bot y. Only the areas of the graphics graphics-window window that lie within the clip-box boundaries will be displayed. Use of the clip-box gives an extra level of control, permitting the user to dynamically gfx shift x 11:0 in Horizontal shift in pixels data bring various areas of the graphics window into view. gfx shift y 11:0 in Vertical shift in pixels data One final feature of the address generator is the implementation of a clp top x 11:0 in Top-left x position of clipbox data vertical or horizontal shift of the graphics in the graphics window region. The desired shift in pixels is specified in the gfx shift x and gfx shift y clp top y 11:0 in Top-left y-position of clipbox data parameters. Applying a shift is useful for scrolling graphics (e.g. parallax clp bot x 11:0 in Bottom-right x position of data scrolling) and moving banner displays. clipbox All address generator parameters may be updated on-the-fly . If these clp bot y 11:0 in Bottom-right y position of data parameters are not static, then it is desirable that they be updated clipbox simultaneously and once per frame in order to avoid corruption in the output video. Figure 2 shows the relationship between the input video display area, the graphics window region and the clip-box. Copyright 2012 www.zipcores.com Download this VHDL Core Page 2 of 8