DATA SHEET LDMOS FIELD EFFECT TRANSISTOR NE55410GR N-CHANNEL SILICON POWER LDMOS FET FOR 2 W + 10 W VHF to L-BAND SINGLE-END POWER AMPLIFIER DESCRIPTION The NE55410GR is an N-channel enhancement-mode LDMOS FET designed for driver 0.1 to 2.6 GHz PA, such as, cellular base station amplifier, analog/digital TV-transmitters, and the other PAs. This product has two different FET s on one die manufactured using our NEWMOS technology (our WSi gate lateral MOS FET), and its nitride surface passivation and quadruple layer aluminum silicon metalization offer a high degree of reliability. FEATURES Two different FETs (Q1 : Pout = 2 W, Q2 : Pout = 10 W) in one package Over 25 dB gain available by connecting two FETs in series : GL (Q1) = 13.5 dB TYP. (VDS = 28 V, IDset (Q1) = 20 mA, f = 2 140 MHz) : GL (Q2) = 11.0 dB TYP. (VDS = 28 V, IDset (Q2) = 100 mA, f = 2 140 MHz) High 1 dB compression output power : PO (1 dB) (Q1) = 35.4 dBm TYP. (VDS = 28 V, IDset (Q1) = 20 mA, f = 2 140 MHz) : PO (1 dB) (Q2) = 40.4 dBm TYP. (VDS = 28 V, IDset (Q2) = 100 mA, f = 2 140 MHz) High drain efficiency : d (Q1) = 52% TYP. (VDS = 28 V, IDset (Q1) = 20 mA, f = 2 140 MHz) : d (Q2) = 46% TYP. (VDS = 28 V, IDset (Q2) = 100 mA, f = 2 140 MHz) Low intermodulation distortion : IM3 (Q1) = 40 dBc TYP. (VDS = 28 V, IDset (Q1+Q2) = 120 mA, f = 2 132.5/2 147.5 MHz, Pout = 33 dBm (2 tones) ) Single Supply (VDS : 3 V < VDS 32 V) <R> Excellent Thermal Stability Surface mount type and Super low cost plastic package : 16-pin plastic HTSSOP Integrated ESD protection Excellent stability against HCI (Hot Carrier Injection) APPLICATION <R> Digital cellular base station PA : W-CDMA/GSM/D-AMPS/N-CDMA/PCS etc. UHF-band TV transmitter PA Caution Observe precautions when handling because these devices are sensitive to electrostatic discharge. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Document No. PU10542EJ03V0DS (3rd edition) Date Published January 2007 NS CP(N) The mark <R> shows major revised points. The revised points can be easily searched by copying an<R in the PDF file and specifying it in theFind what field. DISCONTINUEDNE55410GR ORDERING INFORMATION Part Number Order Number Package Marking Supplying Form NE55410GR NE55410GR-T3-AZ 16-pin plastic HTSSOP 55410 Embossed tape 12 mm wide Note (Pb-Free) Pin 1 and 8 indicates pull-out direction of tape Qty 1 kpcs/reel Note With regards to terminal solder (the solder contains lead) plated products (conventionally plated), contact your nearby sales office. Remark To order evaluation samples, contact your nearby sales office. Part number for sample order: NE55410GR PIN CONNECTIONS AND INTERNAL BLOCK DIAGRAM Pin No. Pin Name Pin No. Pin Name (Top View) S 1 Source 9 Source 2 Drain (Q2) 10 Gate (Q1) 9 8 S S Q1 10 7 3 Drain (Q2) 11 Source 11 6 S S 4 Drain (Q2) 12 Drain (Q1) S 12 5 5 Drain (Q2) 13 Source 13 4 S Q2 6 Source 14 Gate (Q2) 14 3 7 Gate (Q1) 15 Gate (Q2) 15 2 S 16 1 S S 8 Source 16 Source Remark All the terminals of a Q2 connected to a S circuit. Backside : Source (S) ABSOLUTE MAXIMUM RATINGS (TA = +25C, unless otherwise specified) Parameter Symbol Test Conditions Ratings Unit Drain to Source Voltage VDS 65 V Gate to Source Voltage VGS 7 V Drain Current (Q1) ID (Q1) 0.25 A Drain Current (Q2) ID (Q2) 1.0 A Total Device Dissipation (Tcase = 25C) Ptot 40 W Input Power (Q1) Pin (Q1) f = 2.14 GHz, VDS = 28 V 0.3 W Input Power (Q2) Pin (Q2) f = 2.14 GHz, VDS = 28 V 1.5 W Channel Temperature Tch 150 C Storage Temperature Tstg 65 to +150 C 2 Data Sheet PU10542EJ03V0DS DISCONTINUED