Product Technical OrOrdderer Folder Support NowNow InterFET IFNU410-1-2 IFNU410, IFNU411, IFNU412 Dual Matched N-Channel JFET Features TO-71 Bottom View Source InterFET N0016H Geometry 5 Drain Low Leakage: 10 pA Typical 6 Low Input Capacitance: 3.5 pF Typical Gate 3 7 Gate High Input Impedance Replacement for U410, U411, U412 2 Drain RoHS Compliant 1 Source SMT, TH, and Bare Die Package options. SOIC8 Top View Applications Low Noise Differential Amplifier Gate 1 8 Gate Differential Amplifier Drain 2 7 Source Wide-Band Amplifier Source 3 6 Drain Description Gate 4 5 Gate The -40V InterFET IFNU410, IFNU411, and IFNU412 JFETs are targeted for low noise differential amplifier designs. Gate leakages are less than 10pA at room temperatures. The TO-71 package is hermetically sealed and suitable for military applications. Custom specifications, matching, and packaging options are available. Product Summary Parameters IFNU410 Min IFNU411 Min IFNU412 Min Unit BVGSS Gate to Source Breakdown Voltage -40 -40 -40 V IDSS Drain to Source Saturation Current 0.5 0.5 0.5 mA V Gate to Source Cutoff Voltage -0.5 -0.5 -0.5 V GS(off) 1 1 1 G Forward Transconductance mS FS 0.6 0.6 0.6 Ordering Information Custom Part and Binning Options Available Part Number Description Case Packaging IFNU410 IFNU411 IFNU412 Through-Hole TO-71 Bulk SMPU410 SMPU411 SMPU412 Surface Mount SOIC8 Bulk 7 Tape and Reel: Max 500 Pieces Minimum 500 Pieces SMPU410 SMPU411 SMPU412 13 Tape and Reel: Max 2,500 Pieces SOIC8 Tape and Reel IFNU410COT IFNU411COT IFNU412COT * Chip Orientated Tray (COT Waffle Pack) COT 70/Waffle Pack IFNU410CFT IFNU411CFT IFNU412CFT * Chip Face-up Tray (CFT Waffle Pack) CFT 70/Waffle Pack * Bare die packaged options are designed for matched specifications but not 100% tested Disclaimer: It is the Buyers responsibility for designing, validating and testing the end application under all field use cases and extreme use conditions. Guaranteeing the application meets required standards, regulatory compliance, and all safety and security requirements is the responsibility of the Buyer. These resources are subject to change without notice. IF35016.R00Product Technical OrOrdderer Folder Support NowNow InterFET IFNU410-1-2 Electrical Characteristics Maximum Ratings ( TA = 25C, Unless otherwise specified) Parameters Value Unit VRGS Reverse Gate Source and Gate Drain Voltage -40 V I Continuous Forward Gate Current 50 mA FG P Continuous Device Power Dissipation 375 mW D P Power Derating 3 mW/C T Operating Junction Temperature -55 to 125 C J T Storage Temperature -65 to 150 C STG Static Characteristics ( TA = 25C, Unless otherwise specified) IFNU410, IFNU411, IFNU412 Parameters Conditions Min Typ Max Unit Gate to Source V I = -1A,V = 0V -40 V (BR)GSS G DS Breakdown Voltage Gate to Source I V = -30V, V = 0V -0.2 nA GSS GS DS Reverse Current I Gate Operating Current V = 10V, I = 200A -200 pA G DS D Gate to Source V V = 20V, I = 1nA -0.5 -3.5 V GS(OFF) DS D Cutoff Voltage V Gate Source Voltage V = 20V, I = 200A -0.2 -3 V GS DS D Drain to Source V = 20V, V = 0V DS GS I 0.5 5 mA DSS Saturation Current (Pulsed) Dynamic Characteristics ( TA = 25C, Unless otherwise specified) IFNU410, IFNU411, IFNU412 Parameters Conditions Min Typ Max Unit Forward V = 20V, V = 0V, f = 1kHz 1 4 DS GS GFS mS Transconductance V = 20V, I = 200A, f = 1kHz 0.6 1.2 DS D V = 20V, V = 0V, f = 1kHz 20 DS GS GOS Output Conductance S V = 20V, I = 200A, f = 1kHz 5 DS D Ciss Input Capacitance VDS = 20V, VGS = 0V, f = 1MHz 4.5 pF C Reverse Capacitance V = 20V, V = 0V, f = 1MHz 1.2 pF rss DS GS Equivalent Circuit V = 20V, I = 200A, f = 100Hz 20 70 e DS D nV/ Hz n Input Noise Voltage IFNU410 10 Differential Gate V V GS1 GS2 VDS = 20V, ID = -200A IFNU411 20 mV Source Voltage IFNU412 40 Differential Gate IFNU410 1 V V VDS = 20V, ID = 200A GS1 GS2 Source Voltage with IFNU411 2.5 mV/C T TA = 25C, TB = 85C Temperature IFNU412 4 IFNU410 80 Common Mode VDD = 10V to 20V, CMRR IFNU411 80 dB Rejection Ratio ID = 200A IFNU412 70 IFNU410-1-2 2 of 4 InterFET Corporation Document Number: IF35016.R00 www.InterFET.com December, 2018