Product Technical OrOrdderer Folder Support NowNow InterFET J108-9 J108, J109 N-Channel JFET Features SOT23 Top View InterFET N0450S Geometry Low Noise: 1 nV/Hz Typical Source 1 High Gain: 100mS Typical RoHS Compliant Gate 3 SMT, TH, and Bare Die Package options. Drain 2 Applications Choppers Commutators TO-92 Bottom View Analog Switches Gate 3 Description The -25V InterFET J108 and J109 JFETs are Drain 2 targeted for high gain low noise switching, Source 1 commutator, and chopper applications. Product Summary Parameters J108 Min J109 Min Unit BVGSS Gate to Source Breakdown Voltage -25 -25 V IDSS Drain to Source Saturation Current 80 40 mA V Gate to Source Cutoff Voltage -3 -2 V GS(off) Ordering Information Custom Part and Binning Options Available Part Number Description Case Packaging J108 J109 Through-Hole TO-92 Bulk SMPJ108 SMPJ109 Surface Mount SOT23 Bulk 7 Tape and Reel: Max 3,000 Pieces Minimum 1,000 Pieces SMPJ108TR SMPJ109TR 13 Tape and Reel: Max 9,000 Pieces SOT23 Tape and Reel J108COT J109COT Chip Orientated Tray (COT Waffle Pack) COT 400/Waffle Pack J108CFT J109CFT Chip Face-up Tray (CFT Waffle Pack) CFT 400/Waffle Pack Disclaimer: It is the Buyers responsibility for designing, validating and testing the end application under all field use cases and extreme use conditions. Guaranteeing the application meets required standards, regulatory compliance, and all safety and security requirements is the responsibility of the Buyer. These resources are subject to change without notice. IF35072.R00Product Technical OrOrdderer Folder Support NowNow InterFET J108-9 Electrical Characteristics Maximum Ratings ( TA = 25C, Unless otherwise specified) Parameters Value Unit VRGS Reverse Gate Source and Gate Drain Voltage -25 V I Continuous Forward Gate Current 50 mA FG P Continuous Device Power Dissipation 360 mW D P Power Derating 3.27 mW/C T Operating Junction Temperature -55 to 125 C J T Storage Temperature -65 to 200 C STG Static Characteristics ( TA = 25C, Unless otherwise specified) J108 J109 Parameters Conditions Min Max Min Max Unit Gate to Source V(BR)GSS VDS = 0V, IG = -1A -25 -25 V Breakdown Voltage Gate to Source IGSS VGS = -15V, VDS = 0V -3 -3 nA Reverse Current Gate to Source VGS(OFF) VDS = 5V, ID = 1A -3 -10 -2 -6 V Cutoff Voltage Drain to Source V = 0V, V = 15V GS DS IDSS 80 40 mA Saturation Current (Pulsed) ID Drain Cutoff Current VDS = 5V, VGS = -10V 3 3 nA Dynamic Characteristics ( TA = 25C, Unless otherwise specified) J108 J109 Parameters Conditions Min Max Min Max Unit Drain to Source RDS(ON) VDS <= 0.1V, VGS = 0V, f = 1kHz 8 12 ON Resistance Drain Gate Cgd VDS = 0V, VGS = -10V, f = 1MHz 15 15 pF Capacitance Cgs Input Capacitance VDS = 0V, VGS = -10V, f = 1MHz 15 15 pF Drain + Source Gate Cgd + Cgs VDS = VGS = 0V, f = 1MHz 85 85 pF Capacitance td(ON) Turn ON Delay Time 3 (typ) 3 (typ) ns tr Rise Time VDD = 1.5V, RL = 150 1 (typ) 1 (typ) ns J108: VGS(OFF) = -12V td(OFF) Turn OFF Delay Time J109: VGS(OFF) = -7V 4 (typ) 4 (typ) ns tf Fall Time 18 (typ) 18 (typ) ns J108-9 2 of 4 InterFET Corporation Document Number: IF35072.R00 www.InterFET.com June, 2019