Product Technical OrOrdderer Folder Support NowNow InterFET J174-5 J174, J175 P-Channel JFET Features SOT23 Top View InterFET P0099F Geometry Low Noise: 8 nV/Hz Typical Source 1 Low Rds(on): 85 Ohms Maximum RoHS Compliant Gate 3 SMT, TH, and Bare Die Package options. Drain 2 Applications Choppers Commutators TO-92 Bottom View Analog Switches Drain 3 Description The 30V InterFET J174 and J175 JFETs are Gate 2 targeted for high gain low noise switching, Source 1 commutator, and chopper applications. Product Summary Parameters J174 Min J175 Min Unit BVGSS Gate to Source Breakdown Voltage 30 30 V IDSS Drain to Source Saturation Current -20 -7 mA V Gate to Source Cutoff Voltage 5 3 V GS(off) Ordering Information Custom Part and Binning Options Available Part Number Description Case Packaging J174 J175 Through-Hole TO-92 Bulk SMPJ174 SMPJ175 Surface Mount SOT23 Bulk 7 Tape and Reel: Max 3,000 Pieces Minimum 1,000 Pieces SMPJ174TR SMPJ175TR 13 Tape and Reel: Max 9,000 Pieces SOT23 Tape and Reel J174COT J175COT Chip Orientated Tray (COT Waffle Pack) COT 400/Waffle Pack J174CFT J175CFT Chip Face-up Tray (CFT Waffle Pack) CFT 400/Waffle Pack Disclaimer: It is the Buyers responsibility for designing, validating and testing the end application under all field use cases and extreme use conditions. Guaranteeing the application meets required standards, regulatory compliance, and all safety and security requirements is the responsibility of the Buyer. These resources are subject to change without notice. IF35088.R00Product Technical OrOrdderer Folder Support NowNow InterFET J174-5 Electrical Characteristics Maximum Ratings ( TA = 25C, Unless otherwise specified) Parameters Value Unit VRGS Reverse Gate Source and Gate Drain Voltage 30 V I Continuous Forward Gate Current 50 mA FG P Continuous Device Power Dissipation 360 mW D P Power Derating 3.27 mW/C T Operating Junction Temperature -55 to 125 C J T Storage Temperature -65 to 200 C STG Static Characteristics ( TA = 25C, Unless otherwise specified) J174 J175 Parameters Conditions Min Max Min Max Unit Gate to Source V(BR)GSS VDS = 0V, IG = 1A 30 30 V Breakdown Voltage Gate to Source IGSS VGS = 20V, VDS = 0V 1 1 nA Reverse Current Gate to Source VGS(OFF) VDS = -15V, ID = -10nA 5 10 3 6 V Cutoff Voltage Drain to Source V = 0V, V = -15V GS DS IDSS -20 -125 -7 -70 mA Saturation Current (Pulsed) ID(OFF) Drain Cutoff Current VDS = -15V, VGS = 10V -1 -1 nA Dynamic Characteristics ( TA = 25C, Unless otherwise specified) J174 J175 Parameters Conditions Min Max Min Max Unit Drain to Source RDS(ON) VDS <= 0.1V, VGS = 0V, f = 1kHz 85 85 ON Resistance Drain Gate Cgd VDS = 0V, VGS = 10V, f = 1MHz 5.5 (typ) 5.5 (typ) pF Capacitance Cgs Input Capacitance VDS = 0V, VGS = 10V, f = 1MHz 5.5 (typ) 5.5 (typ) pF Drain + Source Gate Cgd + Cgs VDS = VGS = 0V, f = 1MHz 32 (typ) 32 (typ) pF Capacitance td(ON) Turn ON Delay Time 2 (typ) 5 (typ) ns J174: V = -10V, V = 12V, DD GS(OFF) tr Rise Time RL = 560 5 (typ) 10 (typ) ns td(OFF) Turn OFF Delay Time J175: VDD = -6V, VGS(OFF) = 8V 5 (typ) 10 (typ) ns R = 1200 L tf Fall Time 10 (typ) 20 (typ) ns J174-5 2 of 4 InterFET Corporation Document Number: IF35088.R00 www.InterFET.com June, 2019