Document Number: MMPF0200Z Freescale Semiconductor Rev. 2.0, 11/2014 Advance Information 12 Channel Configurable Power PF0200Z Management Integrated Circuit The PF0200Z Power Management Integrated Circuit (PMIC) provides a highly programmable/ configurable architecture, with fully integrated power devices and minimal external components. With up to four buck Power Management converters, one boost regulator, six linear regulators, RTC supply, and coin-cell charger, the PF0200Z can provide power for a complete system, including applications processors, memory, and system peripherals, in a wide range of applications. With on-chip One Time Programmable (OTP) memory, the PF0200Z is available in pre- programmed standard versions, or non-programmed to support custom programming. The PF0200Z is especially suited to the i.MX 6SoloLite, i.MX 6Solo and i.MX 6DualLite versions of the i.MX 6 ES SUFFIX (WF-TYPE) family of devices and is supported by full system level reference 56 QFN 8X8 designs, and pre-programmed versions of the device. This device is 98ASA00589D powered by SMARTMOS technology. Applications Features: GPS Auto infotainment Three to four buck converters, depending on configuration Heads up display (HUD) Boost regulator to 5.0 V output Rear displays Six general purpose linear regulators Digital instrumentation cluster (DIC) Programmable output voltage, sequence, and timing OTP (One Time Programmable) memory for device configuration Coin cell charger and RTC supply DDR termination reference voltage Power control logic with processor interface and event detection 2 I C control Individually programmable ON, OFF, and Standby modes PF0200Z i.MX6X VREFDDR DDR MEMORY DDR Memory INTERFACE SW3A/B Processor Core SW1A/B Voltages External AMP Microphones SW2 Speakers SATA - FLASH SD-MMC/ SATA NAND - NOR NAND Mem. HDD Interfaces SWBST Audio Codec Parallel control/GPIOS Control Signals 2 2 I C Communication I C Communication Sensors VGEN1 Camera Camera GPS VGEN2 WAM MIPI GPS uPCIe MIPI VGEN3 HDMI VGEN4 LDVS Display VGEN5 USB Ethernet LICELL VGEN6 CAN Charger COINCELL Main Supply Front USB Rear Seat Rear USB Cluster/HUD POD Infotaiment POD Figure 1. Simplified Application Diagram * This document contains certain information on a new product. Specifications and information herein are subject to change without notice. Freescale Semiconductor, Inc., 2014. All rights reserved.Table of Contents 1 Orderable Parts . 4 2 Internal Block Diagram . 5 3 Pin Connections . 6 3.1 Pinout Diagram . 6 3.2 Pin Definitions 7 4 General Product Characteristics . 10 4.1 Absolute Maximum Ratings . 10 4.2 Thermal Characteristics 11 4.2.1 Power Dissipation . 12 4.3 Electrical Characteristics . 12 4.3.1 General Specifications 12 4.3.2 Current Consumption . 14 5 General Description . 16 5.1 Features . 16 5.2 Functional Block Diagram 17 5.3 Functional Description . 17 5.3.1 Power Generation . 17 5.3.2 Control Logic . 18 6 Functional Block Requirements and Behaviors 19 6.1 Start-up 19 6.1.1 Device Start-up Configuration 19 6.1.2 One Time Programmability (OTP) . 21 6.1.3 OTP Prototyping 23 6.1.4 Reading OTP Fuses . 23 6.1.5 Programming OTP Fuses . 24 6.2 16 MHz and 32 kHz Clocks . 24 6.2.1 Clock adjustment 24 6.3 Bias and References Block Description . 25 6.3.1 Internal Core Voltage References . 25 6.3.2 VREFDDR Voltage Reference 26 6.4 Power Generation 28 6.4.1 Modes of Operation 28 6.4.2 State Machine Flow Summary 31 6.4.3 Power Tree 32 6.4.4 Buck Regulators . 35 6.4.5 Boost Regulator . 63 6.4.6 LDO Regulators Description . 66 6.4.7 VSNVS LDO/Switch 83 6.5 Control Interface I2C Block Description 88 6.5.1 I2C Device ID . 88 6.5.2 I2C Operation . 88 6.5.3 Interrupt Handling . 89 6.5.4 Interrupt Bit Summary 89 6.5.5 Specific Registers . 94 6.5.6 Register Bitmap . 95 7 Typical Applications 106 7.1 Introduction 106 7.1.1 Application Diagram . 106 7.1.2 Bill of Material . 107 7.2 PF0200Z Layout Guidelines . 109 7.2.1 General Board Recommendations 109 PF0200Z Analog Integrated Circuit Device Data 2 Freescale Semiconductor