PHT4NQ10LT,135 NXP

PHT4NQ10LT N-channel TrenchMOS logic level FET Rev. 2 28 October 2011 Product data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product is designed and qualified for use in computing, communications, consumer and industrial applications. 1.2 Features and benefits Low conduction losses due to low Logic level compatible on-state resistance 1.3 Applications DC-to-DC converters High-speed line drivers General purpose switching 1.4 Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit V drain-source voltage T 25 C T 150 C - - 100 V DS j j I drain current T =25 C V = 5 V see Figure 1 --3.5 A D sp GS see Figure 2 gate-source voltage -16 - 16 V V GS Static characteristics drain-source on-state V =5V I = 1.75 A T =25C - 200 250 m R DSon GS D j resistance see Figure 10 see Figure 11 2. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline Graphic symbol 1 G gate 4 D 2 D drain 3S source G 4 D drain 132 mbb076 S SOT223 (SC-73) SOT223PHT4NQ10LT NXP Semiconductors N-channel TrenchMOS logic level FET 3. Ordering information Table 3. Ordering information Type number Package Name Description Version PHT4NQ10LT SC-73 plastic surface-mounted package with increased heatsink SOT223 4 leads 4. Marking Table 4. Marking codes Type number Marking code PHT4NQ10LT 4NQ10L 5. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit V drain-source voltage T 25 C T 150 C - 100 V DS j j V drain-gate voltage T 25 C T 150 C R =20k - 100 V DGR j j GS V gate-source voltage -16 16 V GS I drain current T = 100 C V =5V - 2.2 A D sp GS T =25 C V = 5 V see Figure 1 -3.5 A sp GS see Figure 2 I peak drain current T = 25 C pulsed t 10 s -14 A DM sp p see Figure 1 P total power dissipation T =25 C see Figure 3 -6.9 W tot sp T storage temperature -65 150 C stg T junction temperature -65 150 C j Source-drain diode I source current T =25C - 3.5 A S sp I peak source current T = 25 C pulsed t 10 s - 14 A SM sp p Avalanche ruggedness E non-repetitive drain-source V =5V T =25 C I =3.5 A -45 mJ DS(AL)S GS j D avalanche energy R =50 V 15 V unclamped GS sup t =0.2 ms see Figure 4 p I non-repetitive avalanche V 15 V V =5V T =25C -3.5 A AS sup GS j(init) current R =50 unclamped see Figure 4 GS PHT4NQ10LT All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 28 October 2011 2 of 13