ESD8016 ESD Protection Diode Low Capacitance Array for High Speed Data Lines The ESD8016 surge protection is specifically designed to protect www.onsemi.com USB 3.0/3.1 and Thunderbolt interfaces from ESD. Ultra low capacitance and low ESD clamping voltage make this device an ideal MARKING solution for protecting voltage sensitive high speed data lines. The DIAGRAM flowthrough style package allows for easy PCB layout and matched trace lengths necessary to maintain consistent impedance between UDFN8 6AM high speed differential lines. CASE 517CX Features 6A = Specific Device Code M = Date Code Low Capacitance (0.32 pF Max, I/O to GND) = PbFree Package Protection for the Following IEC Standards: (Note: Microdot may be in either location) IEC 6100042 (Level 4) Low ESD Clamping Voltage PIN CONFIGURATION These Devices are PbFree, Halogen Free/BFR Free and are RoHS I/O I/O I/O I/O Compliant 8 7 6 5 Typical Applications USB 3.0/3.1 Thunderbolt 12 3 4 Display Port I/O GND GND I/O MAXIMUM RATINGS (T = 25C unless otherwise noted) J ORDERING INFORMATION Rating Symbol Value Unit Device Package Shipping Operating Junction Temperature Range T 55 to +125 C J ESD8016MUTAG UDFN8 3000 / Tape & Reel Storage Temperature Range T 55 to +150 C stg (PbFree) Lead Solder Temperature T 260 C L For information on tape and reel specifications, Maximum (10 Seconds) including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification IEC 6100042 Contact (ESD) ESD 15 kV Brochure, BRD8011/D. IEC 6100042 Air (ESD) ESD 15 kV Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. See Application Note AND8308/D for further description of survivability specs. Semiconductor Components Industries, LLC, 2015 1 Publication Order Number: October, 2017 Rev. 1 ESD8016/DESD8016 I/O I/O I/O I/O I/O I/O Pin 1 Pin 4 Pin 5 Pin 6 Pin 7 Pin 8 Pins 2, 3 Note: Common GND Only Minimum of 1 GND connection required Figure 1. Pin Schematic www.onsemi.com 2 =