ESD8040 ESD Protection Diode Low Capacitance Array for High Speed Video Interfaces The ESD8040 is designed specifically to protect HDMI and Display www.onsemi.com Port Interfaces with full functionality ESD protection and back drive current protection for V line. Ultralow capacitance and low ESD CC clamping voltage make this device an ideal solution for protecting MARKING voltage sensitive high speed data lines. The flowthrough style DIAGRAM package allows for easy PCB layout and matched trace lengths 18 UDFN18 necessary to maintain consistent impedance for the high speed TMDS 8040M CASE 517CP lines. 1 8040 = Specific Device Code Features M = Date Code Full Function HDMI / Display Port Solution = PbFree Package Single Connect, Flow through Routing for TMDS Lines (Note: Microdot may be in either location) Low Capacitance (0.35 pF Max, I/O to GND) Protection for the Following IEC Standards: ORDERING INFORMATION IEC 6100042 Level 4 UL Flammability Rating of 94 V0 Device Package Shipping This is a PbFree Device ESD8040MUTAG UDFN18 3000 / Tape & Reel (PbFree) Typical Applications For information on tape and reel specifications, HDMI 1.3/1.4/2.0 including part orientation and tape sizes, please Display Port refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. MAXIMUM RATINGS (T = 25C unless otherwise noted) J Rating Symbol Value Unit Operating Junction Temperature Range T 55 to +125 C J Storage Temperature Range T 55 to +150 C stg Lead Solder Temperature T 260 C L Maximum (10 Seconds) IEC 6100042 Contact (ESD) ESD 15 kV IEC 6100042 Air (ESD) ESD 15 kV Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. See Application Note AND8308/D for further description of survivability specs. Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: October, 2017 Rev. 5 ESD8040/DESD8040 Pin 7 Pin 8 Pin 9 Pin 10 Pin 11 Pin 13 Pin 15 Pin 17 Pin 1 Pin 2 Pin 3 Pin 4 Pin 5 Pin 6 Center Pins, Pin 12, 14, 16, 18 Note: Common GND Only minimum of 1 GND connection required = = TMDS I/O Pins 1, 2, 4, 5, 7, 8, 10, 11 NonTMDS I/O Pins 3, 6, 9, 13, 15, 17 Figure 1. Pin Schematic 1 I/O 18 GND 2 I/O I/O 3 GND 17 I/O I/O 4 16 GND I/O 5 I/O 6 GND 15 I/O I/O 7 14 GND I/O 8 13 I/O 9 GND I/O I/O 10 12 GND I/O 11 Figure 2. Pin Configuration Note: Pins 12, 14, 16, 18 and center pins are connected internally as a common ground. Only minimum of one pin needs to be connected to ground for functionality of all pins. www.onsemi.com 2