5 V ECL Differential Data and Clock D FlipFlop MC10EL52, MC100EL52 Description The MC10EL/100EL52 is a differential data, differential clock D flip-flop with reset. The device is functionally equivalent to the E452 www.onsemi.com device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E452, the EL52 is ideally suited for those applications which require the ultimate 8 in AC performance. 1 Data enters the master portion of the flip-flop when the clock is SOIC8 NB LOW and is transferred to the slave, and thus the outputs, upon D SUFFIX a positive transition of the clock. The differential clock inputs of the CASE 75107 EL52 allow the device to also be used as a negative edge triggered device. MARKING DIAGRAM The EL52 employs input clamping circuitry so that under open input 8 conditions (pulled down to V ) the outputs of the device will remain EE HEL52 stable. ALYW The 100 Series contains temperature compensation. 1 Features 365 ps Propagation Delay 8 2.0 GHz Toggle Frequency KEL52 ALYW ESD Protection: > 1 kV Human Body Model 1 > 100 V Machine Model H = MC10 Y = Year PECL Mode Operating Range: V = 4.2 V to 5.7 V CC K = MC100 W = Work Week with V = 0 V EE A = Assembly Location = Pb-Free Package NECL Mode Operating Range: V = 0 V L = Wafer Lot CC with V = 4.2 V to 5.7 V EE (Note: Microdot may be in either location) *For additional marking information, refer to Internal Input Pulldown Resistors on D and CLK Application Note AND8002/D. Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test Moisture Sensitivity: ORDERING INFORMATION Level 1 for SOIC8 NB For Additional Information, see Application Note AND8003/D Device Package Shipping Flammability Rating: UL 94 V0 0.125 in, MC10EL52DG SOIC8NB 98 Units/Tube (Pb-Free) Oxygen: Index 28 to 34 MC10EL52DR2G SOIC8 NB 2500 Transistor Count = 48 Devices (Pb-Free) Tape & Reel These Devices are Pb-Free, Halogen Free and are RoHS Compliant MC100EL52DG SOIC8 NB 98 Units/Tube (Pb-Free) For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifica- tions Brochure, BRD8011/D. Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: March, 2021 Rev. 8 MC10EL52/DMC10EL52, MC100EL52 Table 1. TRUTH TABLE D 1 8 V D* CLK* Q CC L Z L H H Z D D 2 7 Q Z = LOW to HIGH Transition * Pin will default low when left open. Table 2. PIN DESCRIPTION CLK 3 6 Q PIN FUNCTION D, D ECL Data Input CLK, CLK ECL Clock Input CLK45 V EE Q, Q ECL Data Output V Positive Supply CC V Negative Supply EE Figure 1. Logic Diagram and Pinout Assignment Table 3. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition 2 Rating Unit V PECL Mode Power Supply V = 0 V 8 V CC EE V NECL Mode Power Supply V = 0 V 8 V EE CC V PECL Mode Input Voltage V = 0 V V V 6 V I EE I CC NECL Mode Input Voltage V = 0 V V V 6 CC I EE I Output Current Continuous 50 mA out Surge 100 T Operating Temperature Range 40 to +85 C A T Storage Temperature Range 65 to +150 C stg Thermal Resistance (Junction-to-Ambient) 0 lfpm SOIC8 NB 190 C/W JA 500 lfpm SOIC8 NB 130 Thermal Resistance (Junction-to-Case) Standard Board SOIC8 NB 41 to 44 C/W JC T Wave Solder (Pb-Free) < 2 to 3 sec 260C 265 C sol Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. www.onsemi.com 2