Doc No. TT4-EA-14212 Revision. 5 Product Standards MOS FET SC8673040L Unit : mm SC8673040L 5.1 Asymmetric Dual Silicon N-ch Power MOS FET 4.9 0.22 8 7 6 5 For DC-DC Converter Features Low Drain-source On-state Resistance : RDS(on) typ. FET1 : 10 m (VGS = 4.5 V), FET2 : 1.9 m (VGS = 4.5 V) 1 234 Halogen-free / RoHS compliant 0.4 1.0 (EU RoHS / UL-94 V-0 / MSL : Level 1 compliant) 1.27 Marking Symbol : A2 1. Gate(FET1) 5. Source(FET2) 2. Drain(FET1) 6. Source(FET2) Packaging 3. Drain(FET1) 7. Source(FET2) Embossed type (Thermo-compression sealing) : 3 000 pcs / reel (standard) 4. Drain(FET1) 8. Gate(FET2) Panasonic HSO8-F3-B JEITA Code Absolute Maximum Ratings Ta = 25 C Rating Parameter Symbol Unit FET1 FET2 Internal Circuit Drain to Source Voltage VDS 30 30 V G2G2 S2S2 SS22 SS22 Gate to Source Voltage VGS V 20 20 88 77 66 55 Package limited ID1 16 46 Drain Current A *1 ID2 10 25 DC Q2Q2 S1S1//DD22 *1 *2 IDp 48 138 A Drain Current (Pulsed) *1 PD1 1.7 2.5 Ta = 25 C, DC Total Power FET2 *3 PD2 11 W Ta = 25 C, DC Q1Q1 FET1 Dissipation Tc = 25 C PD3 19 40 11 22 33 44 *1 Rth(ch-a)1 70 50 Channel to Ambient G1G1 D1D1 DD11 D1D1 Thermal *3 Rth(ch-a)2 125 120 Channel to Ambient C / W Resistance Channel to Case Rth(ch-c) 6.6 3.1 Pin Name Channel Temperature Tch 150 Operating ambient temperature Topr -40 to +85 C Storage Temperature Range Tstg -55 to +150 1. Gate(FET1) 5. Source(FET2) *4 IAR 823 A Avalanche Current (Single pulse) 2. Drain(FET1) 6. Source(FET2) *4 EAR 8 61 mJ 3. Drain(FET1) 7. Source(FET2) Avalanche Energy (Single pulse) Note *1 Device mounted on a glass-epoxy board in Figure 1.1 and 1.2 4. Drain(FET1) 8. Gate(FET2) *2 Pulse test : Ensure that the channel temperature does not exceed 150 C *3 Device mounted on a glass-epoxy board in Figure 1.3 *4 VDD = 24 V, VGS = 10 to 0 V, L = 0.1 mH, Tch = 25 C (initial) FR4 Glass-Epoxy Board (25.4 mm 25.4 mm 0.8 mm) Outline and Figures S2S2 S2 G2 S1/D2 D1D1 D1 D1 D1D1 G1 G1 Figure 1.1 (FET1) Figure 1.2 (FET2) Figure 1.3 (FET1, FET2) Page 1 of 8 Established : 2012-09-14 Revised : 2013-05-29 Maintenance/ Discontinued Maintenance/Discontinued includes following four Product lifecycle stage. (planed maintenance type, maintenance type, planed discontinued typed, discontinued type) 5.9 6.15Doc No. TT4-EA-14212 Revision. 5 Product Standards MOS FET SC8673040L Electrical Characteristics Ta = 25 C 3 C FET1 Parameter Symbol Conditions Min Typ Max Unit Drain-source Breakdown Voltage VDSS ID = 1 mA, VGS = 0 V 30 V Zero Gate Voltage Drain Current IDSS VDS = 30 V, VGS = 0 V 10 A Gate-source Leakage Current IGSS VGS = 16 V, VDS = 0 V 10 A Gate-source Threshold Voltage Vth ID = 1.01 mA, VDS = 10 V 1 3 V RDS(on)1 ID = 8 A, VGS = 10 V 710 Drain-source On-state Resistance m RDS(on)2 ID = 8 A, VGS = 4.5 V 10 14 Input Capacitance Ciss 780 1 092 VDS = 10 V, VGS = 0 V Output Capacitance Coss 160 224 pF f = 1 MHz Crss 61 98 Reverse Transfer Capacitance *1 td(on) VDD = 15 V, VGS = 0 to 10 V 7 Turn-on Delay Time ns *1 tr ID = 8 A 3 Rise Time *1 td(off) VDD = 15 V, VGS = 10 to 0 V 34 Turn-off Delay Time ns *1 tf ID = 8 A 4 Fall Time Qg 6.3 Total Gate Charge VDD = 15 V, VGS = 0 to 4.5 V Gate to Source Charge Qgs 2.5 nC ID = 8 A Gate to Drain Charge Qgd 2.1 Gate resistance rg f = 5 MHz 1.2 3 Body Diode Characteristic Parameter Symbol Conditions Min Typ Max Unit Diode Forward Voltage VSD IS = 8 A, VGS = 0 V 0.8 1.2 V Note 1. Measuring methods are based on JAPANESE INDUSTRIAL STANDARD JIS C 7030 Measuring methods for transistors. 2. *1 Measurement circuit for Turn-on Delay Time / Rise Time / Turn-off Delay Time / Fall Time FET2 Parameter Symbol Conditions Min Typ Max Unit Drain-source Breakdown Voltage VDSS ID = 1 mA, VGS = 0 V 30 V Zero Gate Voltage Drain Current IDSS VDS = 30 V, VGS = 0 V 10 A Gate-source Leakage Current IGSS VGS = 16 V, VDS = 0 V 10 A Gate-source Threshold Voltage Vth ID = 5.85 mA, VDS = 10 V 1.3 3 V RDS(on)1 ID = 23 A, VGS = 10 V 1.6 2.2 Drain-source On-state Resistance m RDS(on)2 ID = 23 A, VGS = 4.5 V 1.9 2.5 Input Capacitance Ciss 4 900 6 860 VDS = 10 V, VGS = 0 V Coss 570 798 pF Output Capacitance f = 1 MHz Reverse Transfer Capacitance Crss 410 656 *1 td(on) 18 VDD = 15 V, VGS = 0 to 10 V Turn-on Delay Time ns *1 tr ID = 23 A 14 Rise Time *1 td(off) VDD = 15 V, VGS = 10 to 0 V 75 Turn-off Delay Time ns *1 tf ID = 23 A 11 Fall Time Qg 37 Total Gate Charge VDD = 15 V, VGS = 0 to 4.5 V Gate to Source Charge Qgs 12 nC ID = 23 A Gate to Drain Charge Qgd 14 Gate resistance rg f = 5 MHz 1.2 3 Body Diode Characteristic Parameter Symbol Conditions Min Typ Max Unit Diode Forward Voltage VSD IS = 23 A, VGS = 0 V 0.8 1.2 V Note 1. Measuring methods are based on JAPANESE INDUSTRIAL STANDARD JIS C 7030 Measuring methods for transistors. 2. *1 Measurement circuit for Turn-on Delay Time / Rise Time / Turn-off Delay Time / Fall Time Page 2of 8 Established : 2012-09-14 Revised : 2013-05-29 Maintenance/ Discontinued Maintenance/Discontinued includes following four Product lifecycle stage. (planed maintenance type, maintenance type, planed discontinued typed, discontinued type)