1.6 mm Si8487DB www.vishay.com Vishay Siliconix P-Channel 30 V (D-S) MOSFET FEATURES PRODUCT SUMMARY TrenchFET power MOSFET a, e V (V) R ( ) MAX. I (A) DS DS(on) D Low-on resistance 0.031 at V = -10 V -7.7 GS Ultra-small 1.6 mm x 1.6 mm maximum outline -30 0.035 at V = -4.5 V -7.3 GS 0.045 at V = -2.5 V -6.4 Ultra-thin 0.6 mm maximum height GS Pin compatible to Si8409DB MICRO FOOT 1.6 x 1.6 Material categorization: for definitions of compliance D please see www.vishay.com/doc 99912 2 D 3 S APPLICATIONS Mobile computing, smart phones, 1 tablet PCs G 4 - Load switch G 1 S Backside View Bump Side View - Battery switch Marking Code: 8487 - Charger switch Ordering Information: - OVP switch Si8487DB-T1-E1 (lead (Pb)-free and halogen-free) D P-Channel MOSFET ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) A PARAMETER SYMBOL LIMITUNIT Drain-Source Voltage V -30 DS V Gate-Source Voltage V 12 GS a T = 25 C -7.7 A a T = 70 C -6.2 A Continuous Drain Current (T = 150 C) I J D b T = 25 C -4.9 A b T = 70 C -4 A A Pulsed Drain Current (t = 300 s) I -25 DM a T = 25 C -2.3 A Continuous Source-Drain Diode Current I S b T = 25 C -0.92 A a T = 25 C 2.7 A a T = 70 C 1.8 A Maximum Power Dissipation P W D b T = 25 C 1.1 A b T = 70 C 0.73 A Operating Junction and Storage Temperature Range T , T -55 to +150 J stg V 260 C PR c Package Reflow Conditions IR / convection 260 THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYPICALMAXIMUMUNIT a, f Maximum Junction-to-Ambient t = 5 s R 35 45 thJA C/W b, g Maximum Junction-to-Ambient t = 5 s R 85 110 thJA Notes a. Surface mounted on 1 x 1 FR4 board with full copper, t = 5 s. b. Surface mounted on 1 x 1 FR4 board with minimum copper, t = 5 s. c. Refer to IPC / JEDEC (J-STD-020), no manual or hand soldering. d. In this document, any reference to case represents the body of the MICRO FOOT device and foot is the bump. e. Based on T = 25 C. A f. Maximum under steady state conditions is 85 C/W. g. Maximum under steady state conditions is 175 C/W. S15-1692-Rev. E, 20-Jul-15 Document Number: 63483 1 For technical questions, contact: pmostechsupport vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000 8487 xxx 1.6 mmSi8487DB www.vishay.com Vishay Siliconix SPECIFICATIONS (T = 25 C, unless otherwise noted) J PARAMETER SYMBOL TEST CONDITIONS MIN.TYP.MAX.UNIT Static Drain-Source Breakdown Voltage V V = 0 V, I = -250 A -30 - - V DS GS D V Temperature Coefficient V /T --21 - DS DS J I = -250 A mV/C D V Temperature Coefficient V /T -3.3 - GS(th) GS(th) J Gate-Source Threshold Voltage V V = V , I = -250 A -0.6 - -1.2 V GS(th) DS GS D Gate-Source Leakage I V = 0 V, V = 12 V - - 100 nA GSS DS GS V = -30 V, V = 0 V - - -1 DS GS Zero Gate Voltage Drain Current I A DSS V = -30 V, V = 0 V, T = 70 C - - -10 DS GS J a On-State Drain Current I V -5 V, V = -4.5 V -5 - - A D(on) DS GS V = -10 V, I = -2 A - 0.025 0.031 GS D a Drain-Source On-State Resistance R V = -4.5 V, I = -2 A - 0.028 0.035 DS(on) GS D V = -2.5 V, I = -1 A - 0.036 0.045 GS D a Forward Transconductance g V = -10 V, I = -2 A - 16 - S fs DS D b Dynamic Input Capacitance C - 2240 4480 iss Output Capacitance C V = -15 V, V = 0 V, f = 1 MHz - 200 400 pF oss DS GS Reverse Transfer Capacitance C - 165 330 rss V = -15 V, V = -10 V, I = -2 A - 52 80 DS GS D Total Gate Charge Q g -25 40 nC Gate-Source Charge Q V = -15 V, V = -4.5 V, I = -2 A -4.1 - gs DS GS D Gate-Drain Charge Q -5.7 - gd Gate Resistance R V = -0.1 V, f = 1 MHz - 15 30 g GS Turn-On Delay Time t -25 50 d(on) Rise Time t -22 45 r V = -15 V, R = 15 DD L I -2 A, V = -4.5 V, R = 1 Turn-Off Delay Time t -D GEN g 195390 d(off) Fall Time t -60 120 f ns Turn-On Delay Time t -7 15 d(on) Rise Time t -10 20 r V = -15 V, R = 15 DD L I -2 A, V = -10 V, R = 1 Turn-Off Delay Time t -D GEN g 290580 d(off) Fall Time t -60 120 f Drain-Source Body Diode Characteristics c Continuous Source-Drain Diode I T = 25 C - - -2.3 S A A Pulse Diode Forward Current I -- -25 SM Body Diode Voltage V I = -2 A, V = 0 V - -0.75 -1.2 V SD S GS Body Diode Reverse Recovery Time t - 86 170 ns rr Body Diode Reverse Recovery Charge Q - 85 170 nC rr I = -2 A, dI/dt = 100 A/s, T = 25 C F J Reverse Recovery Fall Time t -23- a ns Reverse Recovery Rise Time t -63- b Notes a. Pulse test pulse width 300 s, duty cycle 2 %. b. Guaranteed by design, not subject to production testing. c. Surface mounted on 1 x 1 FR4 board with full copper, t = 5 s. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. S15-1692-Rev. E, 20-Jul-15 Document Number: 63483 2 For technical questions, contact: pmostechsupport vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000