SiR872ADP Vishay Siliconix N-Channel 150 V (D-S) MOSFET FEATURES PRODUCT SUMMARY TrenchFET Power MOSFET g V (V) R () Max. Q (Typ.) I (A) DS DS(on) g D 100 % R and UIS Tested g 0.0180 at V = 10 V 53.7 GS Material categorization: 150 22.8 nC 0.0230 at V = 7.5 V For definitions of compliance please see 45 GS www.vishay.com/doc 99912 PowerPAK SO-8 APPLICATIONS Fixed Telecom S 6.15 mm 5.15 mm DC/DC Converter 1 S D 2 Primary and Secondary Side Switch S 3 G 4 D 8 D 7 G D 6 D 5 Bottom View Ordering Information: S SiR872ADP-T1-GE3 (Lead (Pb)-free and Halogen-free) N-Channel MOSFET ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) A Parameter Symbol LimitUnit V Drain-Source Voltage 150 DS V V Gate-Source Voltage 20 GS T = 25 C C 53.7 T = 70 C C 43 Continuous Drain Current (T = 150 C) I J D b, c T = 25 C A 12.8 b, c T = 70 C 10.2 A A I Pulsed Drain Current (t = 300 s) 100 DM a T = 25 C C 60 I Continuous Source-Drain Diode Current S b, c T = 25 C A 5.6 I Single Pulse Avalanche Current 30 AS L = 0.1 mH Single Pulse Avalanche Energy E 45 mJ AS T = 25 C 104 C T = 70 C 66.6 C P Maximum Power Dissipation W D b, c T = 25 C A 6.25 b, c T = 70 C A 4 T , T Operating Junction and Storage Temperature Range - 55 to 150 J stg C d, e 260 Soldering Recommendations (Peak Temperature) THERMAL RESISTANCE RATINGS Parameter Symbol TypicalMaximumUnit b, f R t 10 s 15 20 Maximum Junction-to-Ambient thJA C/W R Maximum Junction-to-Case (Drain) Steady State 0.9 1.2 thJC Notes: a. Package limited. b. Surface mounted on 1 x 1 FR4 board. c. t = 10 s. d. See solder profile (www.vishay.com/doc 73257). The PowerPAK SO-8 is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components. f. Maximum under steady state conditions is 54 C/W. g. T = 25 C. C Document Number: 63979 For technical questions, contact: pmostechsupport vishay.com www.vishay.com S12-3079-Rev. A, 24-Dec-12 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000SiR872ADP Vishay Siliconix SPECIFICATIONS (T = 25 C, unless otherwise noted) J Parameter Symbol Test Conditions Min. Typ.Max.Unit Static V V = 0 V, I = 250 A Drain-Source Breakdown Voltage 150 V DS GS D V Temperature Coefficient V /T 105 DS DS J I = 250 A mV/C D V Temperature Coefficient V /T - 9.4 GS(th) GS(th) J V V = V , I = 250 A Gate-Source Threshold Voltage 2.5 4.5 V GS(th) DS GS D I V = 0 V, V = 20 V Gate-Source Leakage 100 nA GSS DS GS V = 150 V, V = 0 V 1 DS GS I Zero Gate Voltage Drain Current A DSS V = 150 V, V = 0 V, T = 70 C 10 DS GS J a I V 5 V, V = 10 V 40 A On-State Drain Current D(on) DS GS V = 10 V, I = 20 A 0.0148 0.0180 GS D a R Drain-Source On-State Resistance DS(on) V = 7.5 V, I = 15 A 0.0188 0.0230 GS D a g V = 10 V, I = 20 A 30 S Forward Transconductance fs DS D b Dynamic C Input Capacitance 1286 iss Output Capacitance C V = 75 V, V = 0 V, f = 1 MHz 327 pF oss DS GS C Reverse Transfer Capacitance 28 rss V = 75 V, V = 10 V, I = 20 A 31.3 47 DS GS D Q Total Gate Charge g 22.8 35 Q Gate-Source Charge V = 75 V, V = 7.5 V, I = 20 A 8 nC gs DS GS D Q Gate-Drain Charge 10 gd Q V = 75 V, V = 0 V Output Charge 66 100 oss DS GS R Gate Resistance f = 1 MHz 0.3 1 2 g Turn-On Delay Time t 10 20 d(on) t Rise Time V = 75 V, R = 3.75 12 24 r DD L I 20 A, V = 10 V, R = 1 Turn-Off Delay Time t 15 30 D GEN g d(off) t Fall Time 714 f ns Turn-On Delay Time t 12 24 d(on) t Rise Time V = 75 V, R = 3.75 13 26 r DD L I 20 A, V = 7.5 V, R = 1 Turn-Off Delay Time t 17 34 D GEN g d(off) t Fall Time 816 f Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current I T = 25 C 60 S C A a I 100 Pulse Diode Forward Current SM V I = 5 A Body Diode Voltage 0.77 1.1 V SD S Body Diode Reverse Recovery Time t 95 190 ns rr Q Body Diode Reverse Recovery Charge 280 560 nC rr I = 20 A, dI/dt = 100 A/s, T = 25 C F J Reverse Recovery Fall Time t 72 a ns t Reverse Recovery Rise Time 23 b Notes: a. Pulse test pulse width 300 s, duty cycle 2 %. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. www.vishay.com For technical questions, contact: pmostechsupport vishay.com Document Number: 63979 2 S12-3079-Rev. A, 24-Dec-12 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000