New Product SiR880ADP Vishay Siliconix N-Channel 80 V (D-S) MOSFET FEATURES PRODUCT SUMMARY TrenchFET Power MOSFET a V (V) R () Max. Q (Typ.) I (A) DS DS(on) g D 100 % R and UIS Tested g 0.0063 at V = 10 V 60 GS Material categorization: 0.0068 at V = 7.5 V For definitions of compliance please see 80 60 24 nC GS www.vishay.com/doc 99912 0.0089 at V = 4.5 V 60 GS APPLICATIONS PowerPAK SO-8 Primary Side Switch Isolated DC/DC Converters D S Full Bridge 6.15 mm 5.15 mm 1 S Synchonous Rectification 2 S 3 G 4 D G 8 D 7 D 6 D 5 S Bottom View N-Channel MOSFET Ordering Information: SiR880ADP-T1-GE3 (Lead (Pb)-free and Halogen-free) ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) A Parameter Symbol LimitUnit Drain-Source Voltage V 80 DS V V Gate-Source Voltage 20 GS a T = 25 C C 60 a T = 70 C C 60 Continuous Drain Current (T = 150 C) I J D b, c T = 25 C A 20.7 b, c T = 70 C A 16.4 A I Pulsed Drain Current (t = 300 s) 100 DM a T = 25 C C 60 I Continuous Source-Drain Diode Current S b, c T = 25 C A 4.9 I Single Pulse Avalanche Current 30 AS L = 0.1 mH E Single Pulse Avalanche Energy 45 mJ AS T = 25 C 83 C T = 70 C 53 C Maximum Power Dissipation P W D b, c T = 25 C A 5.4 b, c T = 70 C A 3.4 T , T Operating Junction and Storage Temperature Range - 55 to 150 J stg C d, e 260 Soldering Recommendations (Peak Temperature) THERMAL RESISTANCE RATINGS Parameter Symbol TypicalMaximumUnit b, f R t 10 s 18 23 Maximum Junction-to-Ambient thJA C/W R Maximum Junction-to-Case (Drain) Steady State 11.5 thJC Notes: a. Package limited. b. Surface mounted on 1 x 1 FR4 board. c. t = 10 s. d. See solder profile (www.vishay.com/doc 73257). The PowerPAK SO-8 is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components. f. Maximum under steady state conditions is 65 C/W. Document Number: 63910 For technical questions, contact: pmostechsupport vishay.com www.vishay.com S12-1137-Rev. A, 21-May-12 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000New Product SiR880ADP Vishay Siliconix SPECIFICATIONS (T = 25 C, unless otherwise noted) J Parameter Symbol Test Conditions Min. Typ.Max.Unit Static V V = 0 V, I = 250 A Drain-Source Breakdown Voltage 80 V DS GS D V Temperature Coefficient V /T 37 DS DS J I = 250 A mV/C D V Temperature Coefficient V /T - 5.6 GS(th) GS(th) J V V = V , I = 250 A Gate-Source Threshold Voltage 1.5 3 V GS(th) DS GS D I V = 0 V, V = 20 V Gate-Source Leakage 100 nA GSS DS GS V = 80 V, V = 0 V 1 DS GS I Zero Gate Voltage Drain Current A DSS V = 80 V, V = 0 V, T = 55 C 10 DS GS J a I V 5 V, V = 10 V 40 A On-State Drain Current D(on) DS GS V = 10 V, I = 20 A 0.0052 0.0063 GS D a R V = 7.5 V, I = 15 A 0.0056 0.0068 Drain-Source On-State Resistance DS(on) GS D V = 4.5 V, I = 10 A 0.0074 0.0089 GS D a g V = 10 V, I = 20 A 63 S Forward Transconductance fs DS D b Dynamic Input Capacitance C 2289 iss C V = 40 V, V = 0 V, f = 1 MHz Output Capacitance 1200 pF oss DS GS C Reverse Transfer Capacitance 98 rss V = 40 V, V = 10 V, I = 10 A 47.5 72 DS GS D Total Gate Charge Q V = 40 V, V = 7.5 V, I = 10 A 36.5 55 g DS GS D 24 36 nC Q Gate-Source Charge V = 40 V, V = 4.5 V, I = 10 A 6.8 gs DS GS D Q Gate-Drain Charge 10.6 gd Output Charge Q V = 40 V, V = 0 V 70 105 oss DS GS R Gate Resistance f = 1 MHz 0.3 1 2 g Turn-On Delay Time t 13 26 d(on) t Rise Time V = 40 V, R = 4 10 20 r DD L I 10 A, V = 10 V, R = 1 Turn-Off Delay Time t 41 80 D GEN g d(off) t Fall Time 918 f ns Turn-On Delay Time t 16 32 d(on) t Rise Time V = 40 V, R = 4 16 32 r DD L I 10 A, V = 7.5 V, R = 1 Turn-Off Delay Time t D GEN g 35 70 d(off) t Fall Time 11 22 f Drain-Source Body Diode Characteristics I T = 25 C Continuous Source-Drain Diode Current 60 S C A a I 100 Pulse Diode Forward Current SM V I = 5 A Body Diode Voltage 0.75 1.1 V SD S Body Diode Reverse Recovery Time t 46 90 ns rr Q Body Diode Reverse Recovery Charge 46 90 nC rr I = 10 A, dI/dt = 100 A/s, T = 25 C F J t Reverse Recovery Fall Time 22 a ns t Reverse Recovery Rise Time 24 b Notes: a. Pulse test pulse width 300 s, duty cycle 2 %. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. www.vishay.com For technical questions, contact: pmostechsupport vishay.com Document Number: 63910 2 S12-1137-Rev. A, 21-May-12 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000