SiRA00DP Vishay Siliconix N-Channel 30 V (D-S) MOSFET FEATURES PRODUCT SUMMARY TrenchFET Gen IV Power MOSFET a, g V (V) R () (Max.) Q (Typ.) I (A) DS DS(on) g D 100 % R and UIS Tested g 0.00100 at V = 10 V 100 Material categorization: GS 30 66 nC For definitions of compliance please see 0.00135 at V = 4.5 V 100 GS www.vishay.com/doc 99912 PowerPAK SO-8 APPLICATIONS Synchronous Rectification D ORing S 5.15 mm 6.15 mm 1 S High Power Density DC/DC 2 S 3 VRMs and Embedded DC/DC G 4 G D 8 D 7 D 6 D 5 S Bottom View N-Channel MOSFET Ordering Information: SiRA00DP-T1-GE3 (Lead (Pb)-free and Halogen-free) ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) A Parameter Symbol LimitUnit V Drain-Source Voltage 30 DS V Gate-Source Voltage V + 20, - 16 GS g T = 25 C C 100 g T = 70 C C 100 Continuous Drain Current (T = 150 C) I J D b, c T = 25 C A 58 b, c T = 70 C A 47 A I Pulsed Drain Current (t = 300 s) 400 DM g T = 25 C C 60 I Continuous Source-Drain Diode Current S b, c T = 25 C A 5.6 Single Pulse Avalanche Current I 50 AS L = 0.1 mH E Single Pulse Avalanche Energy 125 mJ AS T = 25 C 104 C T = 70 C 66.6 C P Maximum Power Dissipation W D b, c T = 25 C 6.25 A b, c T = 70 C A 4 Operating Junction and Storage Temperature Range T , T - 55 to 150 J stg C d, e 260 Soldering Recommendations (Peak Temperature) THERMAL RESISTANCE RATINGS Parameter Symbol TypicalMaximumUnit b, f t 10 s R 15 20 Maximum Junction-to-Ambient thJA C/W Maximum Junction-to-Case (Drain) Steady State R 0.9 1.2 thJC Notes: a. Based on T = 25 C. C b. Surface mounted on 1 x 1 FR4 board. c. t = 10 s. d. See solder profile (www.vishay.com/doc 73257). The PowerPAK SO-8 is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components. f. Maximum under steady state conditions is 54 C/W. g. Package limited. Document Number: 63780 www.vishay.com For technical questions, contact: pmostechsupport vishay.com S13-0828-Rev. B, 22-Apr-13 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000SiRA00DP Vishay Siliconix SPECIFICATIONS (T = 25 C, unless otherwise noted) J Parameter Symbol Test Conditions Min. Typ.Max.Unit Static Drain-Source Breakdown Voltage V V = 0 V, I = 250 A 30 V DS GS D V Temperature Coefficient V /T 15 DS DS J I = 250 A mV/C D V Temperature Coefficient V /T - 5.8 GS(th) GS(th) J V V = V , I = 250 A Gate-Source Threshold Voltage 1.1 2.2 V GS(th) DS GS D I V = 0 V, V = + 20, - 16 V Gate-Source Leakage 100 nA GSS DS GS V = 30 V, V = 0 V 1 DS GS I Zero Gate Voltage Drain Current A DSS V = 30 V, V = 0 V, T = 55 C 10 DS GS J a I V 5 V, V = 10 V 50 A On-State Drain Current D(on) DS GS V = 10 V, I = 20 A 0.00083 0.00100 GS D a R Drain-Source On-State Resistance DS(on) V = 4.5 V, I = 15 A 0.00110 0.00135 GS D a g V = 10 V, I = 20 A 140 S Forward Transconductance fs DS D b Dynamic C Input Capacitance 11 700 iss C Output Capacitance 3320 pF oss V = 15 V, V = 0 V, f = 1 MHz DS GS C Reverse Transfer Capacitance 360 rss C /C Ratio 0.031 0.062 rss iss V = 15 V, V = 10 V, I = 20 A 147 220 DS GS D Q Total Gate Charge g 66 100 Q V = 15 V, V = 4.5 V, I = 20 A Gate-Source Charge 26 nC gs DS GS D Q Gate-Drain Charge 8.6 gd Output Charge Q V = 15 V, V = 0 V 89 oss DS GS R Gate Resistance f = 1 MHz 0.3 1.35 2.7 g t Turn-On Delay Time 18 35 d(on) Rise Time t 14 28 r V = 15 V, R = 0.75 DD L I 20 A, V = 10 V, R = 1 t Turn-Off Delay Time D GEN g 67 130 d(off) Fall Time t 11 22 f ns t Turn-On Delay Time 43 85 d(on) t Rise Time V = 15 V, R = 0.75 43 85 r DD L I 20 A, V = 4.5 V, R = 1 Turn-Off Delay Time t 54 100 D GEN g d(off) t Fall Time 15 30 f Drain-Source Body Diode Characteristics I T = 25 C Continuous Source-Drain Diode Current 100 S C A I Pulse Diode Forward Current (t = 100 s) 400 SM p Body Diode Voltage V I = 10 A 0.7 1.1 V SD S t Body Diode Reverse Recovery Time 70 140 ns rr Q Body Diode Reverse Recovery Charge I = 20 A, dI/dt = 100 A/s, 70 140 nC rr F T = 25 C t Reverse Recovery Fall Time J 31 a ns t Reverse Recovery Rise Time 39 b Notes: a. Pulse test pulse width 300 s, duty cycle 2 %. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. www.vishay.com Document Number: 63780 For technical questions, contact: pmostechsupport vishay.com 2 S13-0828-Rev. B, 22-Apr-13 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000