PMCM6501UPEZ Nexperia

PMCM6501UPE 20 V, P-channel Trench MOSFET 3 July 2017 Product data sheet 1. General description P-channel enhancement mode Field-Effect Transistor (FET) in a 6 bumps Wafer Level Chip-Size Package (WLCSP) using Trench MOSFET technology. 2. Features and benefits Low threshold voltage Ultra small package: 0.98 x 1.48 x 0.35 mm Trench MOSFET technology ElectroStatic Discharge (ESD) protection > 2 kV HBM 3. Applications Battery switch High-speed line driver High-side loadswitch Switching circuits 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit V drain-source voltage T = 25 C - - -20 V DS j V gate-source voltage -8 - 8 V GS I drain current V = -4.5 V T = 25 C t 5 s 1 - - -7.3 A D GS amb Static characteristics R drain-source on-state V = -4.5 V I = -3 A T = 25 C - 22 30 m DSon GS D j resistance 2 1 Device mounted on an FR4 PCB, single-sided copper, tin-plated and mounting pad for drain 6 cmNexperia PMCM6501UPE 20 V, P-channel Trench MOSFET 5. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline Graphic symbol A1 G gate 1 2 D A2 S source A B1 S source G B B2 S source C C1 D drain C2 D drain S Transparent top view 017aaa259 WLCSP6 (WLCSP6 3-2) 6. Ordering information Table 3. Ordering information Type number Package Name Description Version PMCM6501UPE WLCSP6 wafer level chip-size package 6 bumps (3 x 2) WLCSP6 3-2 7. Marking Table 4. Marking codes Type number Marking code PMCM6501UPE AF 2 PIN A1 INDICATION MARKING CODE 1 (EXAMPLE) A B C Top view, balls down aaa-013901 Fig. 1. WLCSP6 marking code description PMCM6501UPE All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2017. All rights reserved Product data sheet 3 July 2017 2 / 15